From: Greg KH <gregkh@linuxfoundation.org>
To: "David E. Box" <david.e.box@linux.intel.com>
Cc: lee.jones@linaro.org, hdegoede@redhat.com, bhelgaas@google.com,
andriy.shevchenko@linux.intel.com, srinivas.pandruvada@intel.com,
mgross@linux.intel.com, linux-kernel@vger.kernel.org,
platform-driver-x86@vger.kernel.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH 4/4] platform/x86: Add Intel Software Defined Silicon driver
Date: Mon, 22 Nov 2021 07:21:38 +0100 [thread overview]
Message-ID: <YZs28g87GE3XgAKk@kroah.com> (raw)
In-Reply-To: <4d8ba355de09a4a806b6075305ca8d7156dc70ef.camel@linux.intel.com>
On Sun, Nov 21, 2021 at 09:18:25AM -0800, David E. Box wrote:
> > These sysfs attributes are crazy. Who has audited them to be correct
> > and work properly? It feels like there are just buffer overflows
> > waiting to be exploited in them due to the reading/writing of raw memory
> > buffers all over the place.
>
> Agree with the concern. I can submit the tests that were used. Is selftests the
> best place?
Yes.
> > Where is the userspace tool that uses these files?
>
> The tool will be published in the same github repo as the spec once the driver
> is ready.
Isn't the driver "ready" if you are asking for it to be accepted
here? Why isn't it published already so we can see if it actually is
tested?
thanks,
greg k-h
next prev parent reply other threads:[~2021-11-22 6:21 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-20 23:17 [PATCH 0/4] Auxiliary bus driver support for Intel PCIe VSEC/DVSEC David E. Box
2021-11-20 23:17 ` [PATCH 1/4] PCI: Add #defines for accessing PCIe DVSEC fields David E. Box
2021-11-21 12:24 ` Greg KH
2021-11-21 15:48 ` David E. Box
2021-11-22 18:28 ` Bjorn Helgaas
2021-11-20 23:17 ` [PATCH 2/4] driver core: auxiliary bus: Add driver data helpers David E. Box
2021-11-20 23:17 ` [PATCH 3/4] platform/x86/intel: Move intel_pmt from MFD to Auxiliary Bus David E. Box
2021-11-22 18:43 ` Bjorn Helgaas
2021-11-22 23:09 ` David E. Box
2021-11-20 23:17 ` [PATCH 4/4] platform/x86: Add Intel Software Defined Silicon driver David E. Box
2021-11-21 12:31 ` Greg KH
2021-11-21 17:18 ` David E. Box
2021-11-22 6:21 ` Greg KH [this message]
2021-11-22 14:51 ` David E. Box
2021-11-22 18:44 ` Bjorn Helgaas
2021-11-22 23:20 ` David E. Box
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=YZs28g87GE3XgAKk@kroah.com \
--to=gregkh@linuxfoundation.org \
--cc=andriy.shevchenko@linux.intel.com \
--cc=bhelgaas@google.com \
--cc=david.e.box@linux.intel.com \
--cc=hdegoede@redhat.com \
--cc=lee.jones@linaro.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=mgross@linux.intel.com \
--cc=platform-driver-x86@vger.kernel.org \
--cc=srinivas.pandruvada@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).