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[35.185.214.157]) by smtp.gmail.com with ESMTPSA id m2sm247122pjh.36.2021.12.16.07.46.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Dec 2021 07:46:00 -0800 (PST) Date: Thu, 16 Dec 2021 15:45:57 +0000 From: Sean Christopherson To: Aili Yao Cc: pbonzini@redhat.com, vkuznets@redhat.com, wanpengli@tencent.com, jmattson@google.com, joro@8bytes.org, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, yaoaili@kingsoft.com Subject: Re: [PATCH v2] KVM: LAPIC: Per vCPU control over kvm_can_post_timer_interrupt Message-ID: References: <20211124125409.6eec3938@gmail.com> <20211216162303.230dbdaa@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20211216162303.230dbdaa@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Dec 16, 2021, Aili Yao wrote: > On Tue, 7 Dec 2021 23:23:03 +0000 > Sean Christopherson wrote: > > On Tue, Nov 23, 2021 at 10:00 PM Wanpeng Li wrote: > > > --- > > > arch/x86/kvm/lapic.c | 5 ++--- > > > 1 file changed, 2 insertions(+), 3 deletions(-) > > > > > > diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c > > > index 759952dd1222..8257566d44c7 100644 > > > --- a/arch/x86/kvm/lapic.c > > > +++ b/arch/x86/kvm/lapic.c > > > @@ -113,14 +113,13 @@ static inline u32 kvm_x2apic_id(struct kvm_lapic *apic) > > > > > > static bool kvm_can_post_timer_interrupt(struct kvm_vcpu *vcpu) > > > { > > > - return pi_inject_timer && kvm_vcpu_apicv_active(vcpu); > > > + return pi_inject_timer && kvm_mwait_in_guest(vcpu->kvm) && kvm_vcpu_apicv_active(vcpu); > > > > As Aili's changelog pointed out, MWAIT may not be advertised to the guest. > > > > So I think we want this? With a non-functional, opinionated refactoring of > > kvm_can_use_hv_timer() because I'm terrible at reading !(a || b). > > > > diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c > > index 40270d7bc597..c77cb386d03d 100644 > > --- a/arch/x86/kvm/lapic.c > > +++ b/arch/x86/kvm/lapic.c > > @@ -113,14 +113,25 @@ static inline u32 kvm_x2apic_id(struct kvm_lapic *apic) > > > > static bool kvm_can_post_timer_interrupt(struct kvm_vcpu *vcpu) > > { > > - return pi_inject_timer && kvm_vcpu_apicv_active(vcpu); > > + return pi_inject_timer && kvm_vcpu_apicv_active(vcpu) && > > + (kvm_mwait_in_guest(vcpu) || kvm_hlt_in_guest(vcpu)); > > } > > > > bool kvm_can_use_hv_timer(struct kvm_vcpu *vcpu) > > { > > - return kvm_x86_ops.set_hv_timer > > - && !(kvm_mwait_in_guest(vcpu->kvm) || > > - kvm_can_post_timer_interrupt(vcpu)); > > + /* > > + * Don't use the hypervisor timer, a.k.a. VMX Preemption Timer, if the > > + * guest can execute MWAIT without exiting as the timer will stop > > + * counting if the core enters C3 or lower. HLT in the guest is ok as > > + * HLT is effectively C1 and the timer counts in C0, C1, and C2. > > + * > > + * Don't use the hypervisor timer if KVM can post a timer interrupt to > > + * the guest since posted the timer avoids taking an extra a VM-Exit > > + * when the timer expires. > > + */ > > + return kvm_x86_ops.set_hv_timer && > > + !kvm_mwait_in_guest(vcpu->kvm) && > > + !kvm_can_post_timer_interrupt(vcpu)); > > } > > EXPORT_SYMBOL_GPL(kvm_can_use_hv_timer); > > > > It seems Sean and Wanpeng are busy with some other more important issues; > So Please let me try to merge Sean, Wanpeng's ideas and suggestions together,also including my opinions > into one possible approach and get it reviewed, Only if others are OK with this; > > I will post a new patch for this later today or tomorrow. Sorry, I was waiting for someone to say "this works", but never actually said as much. Does the above change address your use case? If not, what's missing?