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Date:   Tue, 21 Dec 2021 11:32:41 +0000
From:   Catalin Marinas <catalin.marinas@arm.com>
To:     Arnd Bergmann <arnd@arndb.de>
Cc:     Xiongfeng Wang <wangxiongfeng2@huawei.com>,
        Will Deacon <will@kernel.org>,
        Mark Rutland <mark.rutland@arm.com>,
        Peter Zijlstra <peterz@infradead.org>,
        Jonathan Corbet <corbet@lwn.net>,
        Linux ARM <linux-arm-kernel@lists.infradead.org>,
        "open list:DOCUMENTATION" <linux-doc@vger.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        Yufeng Mo <moyufeng@huawei.com>,
        linux-arch <linux-arch@vger.kernel.org>
Subject: Re: [PATCH v2] asm-generic: introduce io_stop_wc() and add
 implementation for ARM64
Message-ID: <YcG7WRvrWiSxcBZt@arm.com>
References: <20211221035556.60346-1-wangxiongfeng2@huawei.com>
 <CAK8P3a2fBdh2kPDo8UGHBD0MhF5k_DoomqUaW+=ZOgksKmGg5A@mail.gmail.com>
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On Tue, Dec 21, 2021 at 10:17:27AM +0100, Arnd Bergmann wrote:
> On Tue, Dec 21, 2021 at 4:55 AM Xiongfeng Wang
> <wangxiongfeng2@huawei.com> wrote:
> >
> > For memory accesses with write-combining attributes (e.g. those returned
> > by ioremap_wc()), the CPU may wait for prior accesses to be merged with
> > subsequent ones. But in some situation, such wait is bad for the
> > performance.
> >
> > We introduce io_stop_wc() to prevent the merging of write-combining
> > memory accesses before this macro with those after it.
> >
> > We add implementation for ARM64 using DGH instruction and provide NOP
> > implementation for other architectures.
> >
> > Signed-off-by: Xiongfeng Wang <wangxiongfeng2@huawei.com>
> > Suggested-by: Will Deacon <will@kernel.org>
> > Suggested-by: Catalin Marinas <catalin.marinas@arm.com>
> > ---
> > v1->v2: change 'Normal-Non Cacheable' to 'write-combining'
> 
> For asm-generic:
> 
> Acked-by: Arnd Bergmann <arnd@arndb.de>
> 
> Will, Catalin: if you are happy with this version, please merge it through the
> arm64 tree.

Thanks for the ack Arnd. I'll queue this through the arm64 tree.

-- 
Catalin