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[92.40.202.152]) by smtp.gmail.com with ESMTPSA id h6sm2213164ede.50.2022.02.10.15.10.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Feb 2022 15:10:13 -0800 (PST) Date: Thu, 10 Feb 2022 23:10:45 +0000 From: Aidan MacDonald To: Paul Cercueil Cc: linus.walleij@linaro.org, linux-mips@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] pinctrl: ingenic: Fix regmap on X series SoCs Message-ID: References: <20220209230452.19535-1-aidanmacdonald.0x0@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Feb 10, 2022 at 11:03:13AM +0000, Paul Cercueil wrote: > Hi Aidan, > > Le mer., févr. 9 2022 at 23:04:54 +0000, Aidan MacDonald > a écrit : > > The X series Ingenic SoCs have a shadow GPIO group which > > is at a higher offset than the other groups, and is used > > for all GPIO configuration. The regmap did not take this > > offset into account and set max_register too low. Writes > > to the shadow group registers were blocked, which made it > > impossible to change any pin configuration. > > > > Fix this by pretending there are at least 8 chips on any > > 'X' SoC for the purposes of calculating max_register. This > > ensures the shadow group is accessible. > > I don't like your solution, it sounds very hacky. I think it would make > more sense to use a dedicated x1000_pinctrl_regmap_config that would be > used for the X1000 SoC. That would also allow you to express that there > are no registers in the 0x400-0x700 range (through > regmap_config.wr_table / .rd_table). > > Cheers, > -Paul > That's fine, I'll put together a v2 patch using the approach you suggest. I think all the 'X' SoCs will require a similar regmap as they're using ingenic_gpio_shadow_* functions too, but I'll check their datasheets to be sure. > > Signed-off-by: Aidan MacDonald > > --- > > drivers/pinctrl/pinctrl-ingenic.c | 5 ++++- > > 1 file changed, 4 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/pinctrl/pinctrl-ingenic.c > > b/drivers/pinctrl/pinctrl-ingenic.c > > index 2712f51eb238..9d2bccda50f1 100644 > > --- a/drivers/pinctrl/pinctrl-ingenic.c > > +++ b/drivers/pinctrl/pinctrl-ingenic.c > > @@ -4168,7 +4168,10 @@ static int __init ingenic_pinctrl_probe(struct > > platform_device *pdev) > > return PTR_ERR(base); > > > > regmap_config = ingenic_pinctrl_regmap_config; > > - regmap_config.max_register = chip_info->num_chips * > > chip_info->reg_offset; > > + if (chip_info->version >= ID_X1000) > > + regmap_config.max_register = MIN(8, chip_info->num_chips) * > > chip_info->reg_offset; > > + else > > + regmap_config.max_register = chip_info->num_chips * > > chip_info->reg_offset; > > > > jzpc->map = devm_regmap_init_mmio(dev, base, ®map_config); > > if (IS_ERR(jzpc->map)) { > > -- > > 2.34.1 > > > >