From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Punit Agrawal <punitagrawal@gmail.com>,
shawn.lin@rock-chips.com, Heiko Stuebner <heiko@sntech.de>
Cc: bhelgaas@google.com, robh@kernel.org, kw@linux.com,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-rockchip@lists.infradead.org
Subject: Re: [PATCH] PCI: rockchip: Enable the phy driver when controller is enabled
Date: Fri, 8 Apr 2022 15:18:09 +0100 [thread overview]
Message-ID: <YlBEIfMl3BbeUNAV@lpieralisi> (raw)
In-Reply-To: <20211019120215.793794-1-punitagrawal@gmail.com>
On Tue, Oct 19, 2021 at 09:02:15PM +0900, Punit Agrawal wrote:
> The PCI controller on rk3399 requires the phy to correctly initialise
> the PCIE phy. Without phy initialisation the host and end-point
> controllers cannot be used.
>
> To prevent building an unusable PCIe driver on rk3399, enable the phy
> driver when the host or end-point driver is enabled.
>
> Signed-off-by: Punit Agrawal <punitagrawal@gmail.com>
> ---
> Hi,
>
> I've been caught out many times when booting off of PCI and finding
> that the kernel cannot find rootfs due to the missing phy driver. The
> patch should prevents this by fixing the Kconfig dependency
> enablement.
>
> Thanks,
> Punit
>
> drivers/pci/controller/Kconfig | 2 ++
> 1 file changed, 2 insertions(+)
Shawn, Heiko,
can I go ahead with this patch please ?
Thanks,
Lorenzo
> diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig
> index 326f7d13024f..1965df38c4a3 100644
> --- a/drivers/pci/controller/Kconfig
> +++ b/drivers/pci/controller/Kconfig
> @@ -214,6 +214,7 @@ config PCIE_ROCKCHIP_HOST
> depends on PCI_MSI_IRQ_DOMAIN
> select MFD_SYSCON
> select PCIE_ROCKCHIP
> + select PHY_ROCKCHIP_PCIE
> help
> Say Y here if you want internal PCI support on Rockchip SoC.
> There is 1 internal PCIe port available to support GEN2 with
> @@ -226,6 +227,7 @@ config PCIE_ROCKCHIP_EP
> depends on PCI_ENDPOINT
> select MFD_SYSCON
> select PCIE_ROCKCHIP
> + select PHY_ROCKCHIP_PCIE
> help
> Say Y here if you want to support Rockchip PCIe controller in
> endpoint mode on Rockchip SoC. There is 1 internal PCIe port
> --
> 2.33.0
>
prev parent reply other threads:[~2022-04-08 14:18 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-19 12:02 [PATCH] PCI: rockchip: Enable the phy driver when controller is enabled Punit Agrawal
2022-04-08 14:18 ` Lorenzo Pieralisi [this message]
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