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[35.185.214.157]) by smtp.gmail.com with ESMTPSA id f14-20020a63380e000000b0038253c4d5casm3176405pga.36.2022.04.12.08.52.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Apr 2022 08:52:07 -0700 (PDT) Date: Tue, 12 Apr 2022 15:52:03 +0000 From: Sean Christopherson To: Ben Gardon Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Paolo Bonzini , Peter Xu , David Matlack , Jim Mattson , David Dunn , Jing Zhang , Junaid Shahid Subject: Re: [PATCH v2 3/9] KVM: x86/mmu: Factor shadow_zero_check out of __make_spte Message-ID: References: <20220321224358.1305530-1-bgardon@google.com> <20220321224358.1305530-4-bgardon@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220321224358.1305530-4-bgardon@google.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Mar 21, 2022, Ben Gardon wrote: > In the interest of devloping a version of __make_spte that can function > without a vCPU pointer, factor out the shadow_zero_mask to be an > additional argument to the function. > > No functional change intended. > > Signed-off-by: Ben Gardon > --- > arch/x86/kvm/mmu/spte.c | 10 ++++++---- > arch/x86/kvm/mmu/spte.h | 2 +- > 2 files changed, 7 insertions(+), 5 deletions(-) > > diff --git a/arch/x86/kvm/mmu/spte.c b/arch/x86/kvm/mmu/spte.c > index 931cf93c3b7e..ef2d85577abb 100644 > --- a/arch/x86/kvm/mmu/spte.c > +++ b/arch/x86/kvm/mmu/spte.c > @@ -94,7 +94,7 @@ bool __make_spte(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, > const struct kvm_memory_slot *slot, unsigned int pte_access, > gfn_t gfn, kvm_pfn_t pfn, u64 old_spte, bool prefetch, > bool can_unsync, bool host_writable, u64 mt_mask, > - u64 *new_spte) > + struct rsvd_bits_validate *shadow_zero_check, u64 *new_spte) Can we name the new param "rsvd_bits"? As mentioned in the other patch, it's not a pure "are these bits zero" check. > { > int level = sp->role.level; > u64 spte = SPTE_MMU_PRESENT_MASK; > @@ -177,9 +177,9 @@ bool __make_spte(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, > if (prefetch) > spte = mark_spte_for_access_track(spte); > > - WARN_ONCE(is_rsvd_spte(&vcpu->arch.mmu->shadow_zero_check, spte, level), > + WARN_ONCE(is_rsvd_spte(shadow_zero_check, spte, level), > "spte = 0x%llx, level = %d, rsvd bits = 0x%llx", spte, level, > - get_rsvd_bits(&vcpu->arch.mmu->shadow_zero_check, spte, level)); > + get_rsvd_bits(shadow_zero_check, spte, level)); > > if ((spte & PT_WRITABLE_MASK) && kvm_slot_dirty_track_enabled(slot)) { > /* Enforced by kvm_mmu_hugepage_adjust. */ > @@ -199,10 +199,12 @@ bool make_spte(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, > { > u64 mt_mask = static_call(kvm_x86_get_mt_mask)(vcpu, gfn, > kvm_is_mmio_pfn(pfn)); > + struct rsvd_bits_validate *shadow_zero_check = > + &vcpu->arch.mmu->shadow_zero_check; > > return __make_spte(vcpu, sp, slot, pte_access, gfn, pfn, old_spte, > prefetch, can_unsync, host_writable, mt_mask, > - new_spte); > + shadow_zero_check, new_spte); I don't see any reason to snapshot the reserved bits, IMO this is much more readable overall: u64 mt_mask = static_call(kvm_x86_get_mt_mask)(vcpu, gfn, kvm_is_mmio_pfn(pfn)); return __make_spte(vcpu->kvm, sp, slot, pte_access, gfn, pfn, old_spte, prefetch, can_unsync, host_writable, mt_mask, &vcpu->arch.mmu->shadow_zero_check, new_spte); And it avoids propagating the shadow_zero_check naming. > diff --git a/arch/x86/kvm/mmu/spte.h b/arch/x86/kvm/mmu/spte.h > index d051f955699e..e8a051188eb6 100644 > --- a/arch/x86/kvm/mmu/spte.h > +++ b/arch/x86/kvm/mmu/spte.h > @@ -414,7 +414,7 @@ bool __make_spte(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, > const struct kvm_memory_slot *slot, unsigned int pte_access, > gfn_t gfn, kvm_pfn_t pfn, u64 old_spte, bool prefetch, > bool can_unsync, bool host_writable, u64 mt_mask, > - u64 *new_spte); > + struct rsvd_bits_validate *shadow_zero_check, u64 *new_spte); > bool make_spte(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, > const struct kvm_memory_slot *slot, > unsigned int pte_access, gfn_t gfn, kvm_pfn_t pfn, > -- > 2.35.1.894.gb6a874cedc-goog >