* [PATCH v2] soc: nuvoton: Add SoC info driver for WPCM450
@ 2022-04-09 17:33 Jonathan Neuschäfer
2022-04-09 17:55 ` Paul Menzel
0 siblings, 1 reply; 3+ messages in thread
From: Jonathan Neuschäfer @ 2022-04-09 17:33 UTC (permalink / raw)
To: openbmc
Cc: Joel Stanley, Jonathan Neuschäfer, Nicolas Ferre,
Conor Dooley, Linus Walleij, Hector Martin, Arnd Bergmann,
linux-kernel
Add a SoC information driver for Nuvoton WPCM450 SoCs. It provides
information such as the SoC revision.
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Joel Stanley <joel@jms.id.au>
---
v2:
- Add R-b tag
- rebase on 5.18-rc1
v1:
- https://lore.kernel.org/lkml/20220129143316.2321460-1-j.neuschaefer@gmx.net/
---
drivers/soc/Kconfig | 1 +
drivers/soc/Makefile | 1 +
drivers/soc/nuvoton/Kconfig | 11 ++++
drivers/soc/nuvoton/Makefile | 2 +
drivers/soc/nuvoton/wpcm450-soc.c | 90 +++++++++++++++++++++++++++++++
5 files changed, 105 insertions(+)
create mode 100644 drivers/soc/nuvoton/Kconfig
create mode 100644 drivers/soc/nuvoton/Makefile
create mode 100644 drivers/soc/nuvoton/wpcm450-soc.c
diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
index c5aae42673d3b..42a5e0be77f3d 100644
--- a/drivers/soc/Kconfig
+++ b/drivers/soc/Kconfig
@@ -14,6 +14,7 @@ source "drivers/soc/ixp4xx/Kconfig"
source "drivers/soc/litex/Kconfig"
source "drivers/soc/mediatek/Kconfig"
source "drivers/soc/microchip/Kconfig"
+source "drivers/soc/nuvoton/Kconfig"
source "drivers/soc/qcom/Kconfig"
source "drivers/soc/renesas/Kconfig"
source "drivers/soc/rockchip/Kconfig"
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index 904eec2a78713..3239fc49eeb27 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_SOC_XWAY) += lantiq/
obj-$(CONFIG_LITEX_SOC_CONTROLLER) += litex/
obj-y += mediatek/
obj-y += microchip/
+obj-y += nuvoton/
obj-y += amlogic/
obj-y += qcom/
obj-y += renesas/
diff --git a/drivers/soc/nuvoton/Kconfig b/drivers/soc/nuvoton/Kconfig
new file mode 100644
index 0000000000000..50166f37096b7
--- /dev/null
+++ b/drivers/soc/nuvoton/Kconfig
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: GPL-2.0
+menuconfig WPCM450_SOC
+ bool "Nuvoton WPCM450 SoC driver"
+ default y if ARCH_WPCM450
+ select SOC_BUS
+ help
+ Say Y here to compile the SoC information driver for Nuvoton
+ WPCM450 SoCs.
+
+ This driver provides information such as the SoC model and
+ revision.
diff --git a/drivers/soc/nuvoton/Makefile b/drivers/soc/nuvoton/Makefile
new file mode 100644
index 0000000000000..e30317b4e8290
--- /dev/null
+++ b/drivers/soc/nuvoton/Makefile
@@ -0,0 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0-only
+obj-$(CONFIG_WPCM450_SOC) += wpcm450-soc.o
diff --git a/drivers/soc/nuvoton/wpcm450-soc.c b/drivers/soc/nuvoton/wpcm450-soc.c
new file mode 100644
index 0000000000000..8bad63e1f7a80
--- /dev/null
+++ b/drivers/soc/nuvoton/wpcm450-soc.c
@@ -0,0 +1,90 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Nuvoton WPCM450 SoC Identification
+ *
+ * Copyright (C) 2022 Jonathan Neuschäfer
+ */
+
+#include <linux/mfd/syscon.h>
+#include <linux/of.h>
+#include <linux/regmap.h>
+#include <linux/sys_soc.h>
+#include <linux/slab.h>
+
+#define GCR_PDID 0
+#define PDID_CHIP(x) ((x) & 0x00ffffff)
+#define CHIP_WPCM450 0x926450
+#define PDID_REV(x) ((x) >> 24)
+
+struct revision {
+ u8 number;
+ const char *name;
+};
+
+const struct revision revisions[] __initconst = {
+ { 0x00, "Z1" },
+ { 0x03, "Z2" },
+ { 0x04, "Z21" },
+ { 0x08, "A1" },
+ { 0x09, "A2" },
+ { 0x0a, "A3" },
+ {}
+};
+
+static const char * __init get_revision(u8 rev)
+{
+ int i;
+
+ for (i = 0; revisions[i].name; i++)
+ if (revisions[i].number == rev)
+ return revisions[i].name;
+ return NULL;
+}
+
+static int __init wpcm450_soc_init(void)
+{
+ struct soc_device_attribute *attr;
+ struct soc_device *soc;
+ const char *revision;
+ struct regmap *gcr;
+ u32 pdid;
+ int ret;
+
+ if (!of_machine_is_compatible("nuvoton,wpcm450"))
+ return 0;
+
+ gcr = syscon_regmap_lookup_by_compatible("nuvoton,wpcm450-gcr");
+ if (IS_ERR(gcr))
+ return PTR_ERR(gcr);
+ ret = regmap_read(gcr, GCR_PDID, &pdid);
+ if (ret)
+ return ret;
+
+ if (PDID_CHIP(pdid) != CHIP_WPCM450) {
+ pr_warn("Unknown chip ID in GCR.PDID: 0x%06x\n", PDID_CHIP(pdid));
+ return -ENODEV;
+ }
+
+ revision = get_revision(PDID_REV(pdid));
+ if (!revision) {
+ pr_warn("Unknown chip revision in GCR.PDID: 0x%02x\n", PDID_REV(pdid));
+ return -ENODEV;
+ }
+
+ attr = kzalloc(sizeof(*attr), GFP_KERNEL);
+ if (!attr)
+ return -ENOMEM;
+
+ attr->family = "Nuvoton NPCM";
+ attr->soc_id = "WPCM450";
+ attr->revision = revision;
+ soc = soc_device_register(attr);
+ if (IS_ERR(soc)) {
+ kfree(attr);
+ pr_warn("Could not register SoC device\n");
+ return PTR_ERR(soc);
+ }
+
+ return 0;
+}
+device_initcall(wpcm450_soc_init);
--
2.35.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH v2] soc: nuvoton: Add SoC info driver for WPCM450
2022-04-09 17:33 [PATCH v2] soc: nuvoton: Add SoC info driver for WPCM450 Jonathan Neuschäfer
@ 2022-04-09 17:55 ` Paul Menzel
2022-04-14 17:02 ` Jonathan Neuschäfer
0 siblings, 1 reply; 3+ messages in thread
From: Paul Menzel @ 2022-04-09 17:55 UTC (permalink / raw)
To: Jonathan Neuschäfer
Cc: openbmc, Arnd Bergmann, linux-kernel, Linus Walleij,
Hector Martin, Nicolas Ferre, Conor Dooley, Joel Stanley
Dear Jonathan,
Thank you for your patch.
Am 09.04.22 um 19:33 schrieb Jonathan Neuschäfer:
> Add a SoC information driver for Nuvoton WPCM450 SoCs. It provides
> information such as the SoC revision.
Maybe add an example command, how to read the model and revision.
> Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
> Reviewed-by: Joel Stanley <joel@jms.id.au>
> ---
>
> v2:
> - Add R-b tag
> - rebase on 5.18-rc1
>
> v1:
> - https://lore.kernel.org/lkml/20220129143316.2321460-1-j.neuschaefer@gmx.net/
> ---
> drivers/soc/Kconfig | 1 +
> drivers/soc/Makefile | 1 +
> drivers/soc/nuvoton/Kconfig | 11 ++++
> drivers/soc/nuvoton/Makefile | 2 +
> drivers/soc/nuvoton/wpcm450-soc.c | 90 +++++++++++++++++++++++++++++++
> 5 files changed, 105 insertions(+)
> create mode 100644 drivers/soc/nuvoton/Kconfig
> create mode 100644 drivers/soc/nuvoton/Makefile
> create mode 100644 drivers/soc/nuvoton/wpcm450-soc.c
>
> diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
> index c5aae42673d3b..42a5e0be77f3d 100644
> --- a/drivers/soc/Kconfig
> +++ b/drivers/soc/Kconfig
> @@ -14,6 +14,7 @@ source "drivers/soc/ixp4xx/Kconfig"
> source "drivers/soc/litex/Kconfig"
> source "drivers/soc/mediatek/Kconfig"
> source "drivers/soc/microchip/Kconfig"
> +source "drivers/soc/nuvoton/Kconfig"
> source "drivers/soc/qcom/Kconfig"
> source "drivers/soc/renesas/Kconfig"
> source "drivers/soc/rockchip/Kconfig"
> diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
> index 904eec2a78713..3239fc49eeb27 100644
> --- a/drivers/soc/Makefile
> +++ b/drivers/soc/Makefile
> @@ -19,6 +19,7 @@ obj-$(CONFIG_SOC_XWAY) += lantiq/
> obj-$(CONFIG_LITEX_SOC_CONTROLLER) += litex/
> obj-y += mediatek/
> obj-y += microchip/
> +obj-y += nuvoton/
> obj-y += amlogic/
> obj-y += qcom/
> obj-y += renesas/
> diff --git a/drivers/soc/nuvoton/Kconfig b/drivers/soc/nuvoton/Kconfig
> new file mode 100644
> index 0000000000000..50166f37096b7
> --- /dev/null
> +++ b/drivers/soc/nuvoton/Kconfig
> @@ -0,0 +1,11 @@
> +# SPDX-License-Identifier: GPL-2.0
> +menuconfig WPCM450_SOC
> + bool "Nuvoton WPCM450 SoC driver"
> + default y if ARCH_WPCM450
> + select SOC_BUS
> + help
> + Say Y here to compile the SoC information driver for Nuvoton
> + WPCM450 SoCs.
> +
> + This driver provides information such as the SoC model and
> + revision.
> diff --git a/drivers/soc/nuvoton/Makefile b/drivers/soc/nuvoton/Makefile
> new file mode 100644
> index 0000000000000..e30317b4e8290
> --- /dev/null
> +++ b/drivers/soc/nuvoton/Makefile
> @@ -0,0 +1,2 @@
> +# SPDX-License-Identifier: GPL-2.0-only
> +obj-$(CONFIG_WPCM450_SOC) += wpcm450-soc.o
> diff --git a/drivers/soc/nuvoton/wpcm450-soc.c b/drivers/soc/nuvoton/wpcm450-soc.c
> new file mode 100644
> index 0000000000000..8bad63e1f7a80
> --- /dev/null
> +++ b/drivers/soc/nuvoton/wpcm450-soc.c
> @@ -0,0 +1,90 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Nuvoton WPCM450 SoC Identification
> + *
> + * Copyright (C) 2022 Jonathan Neuschäfer
> + */
> +
> +#include <linux/mfd/syscon.h>
> +#include <linux/of.h>
> +#include <linux/regmap.h>
> +#include <linux/sys_soc.h>
> +#include <linux/slab.h>
> +
> +#define GCR_PDID 0
> +#define PDID_CHIP(x) ((x) & 0x00ffffff)
> +#define CHIP_WPCM450 0x926450
> +#define PDID_REV(x) ((x) >> 24)
> +
> +struct revision {
> + u8 number;
Can this be just be `unsigned int`s
> + const char *name;
> +};
> +
> +const struct revision revisions[] __initconst = {
> + { 0x00, "Z1" },
> + { 0x03, "Z2" },
> + { 0x04, "Z21" },
> + { 0x08, "A1" },
> + { 0x09, "A2" },
> + { 0x0a, "A3" },
> + {}
> +};
> +
> +static const char * __init get_revision(u8 rev)
> +{
> + int i;
I’d do `unsigned int`, though it does not make a difference in the end
result.
> +
> + for (i = 0; revisions[i].name; i++)
> + if (revisions[i].number == rev)
> + return revisions[i].name;
> + return NULL;
> +}
> +
> +static int __init wpcm450_soc_init(void)
> +{
> + struct soc_device_attribute *attr;
> + struct soc_device *soc;
> + const char *revision;
> + struct regmap *gcr;
> + u32 pdid;
> + int ret;
> +
> + if (!of_machine_is_compatible("nuvoton,wpcm450"))
> + return 0;
> +
> + gcr = syscon_regmap_lookup_by_compatible("nuvoton,wpcm450-gcr");
> + if (IS_ERR(gcr))
> + return PTR_ERR(gcr);
> + ret = regmap_read(gcr, GCR_PDID, &pdid);
> + if (ret)
> + return ret;
> +
> + if (PDID_CHIP(pdid) != CHIP_WPCM450) {
> + pr_warn("Unknown chip ID in GCR.PDID: 0x%06x\n", PDID_CHIP(pdid));
> + return -ENODEV;
> + }
> +
> + revision = get_revision(PDID_REV(pdid));
The signature of `get_revision()` is u8, but you pass u32, if I am not
mistaken.
> + if (!revision) {
> + pr_warn("Unknown chip revision in GCR.PDID: 0x%02x\n", PDID_REV(pdid));
> + return -ENODEV;
> + }
> +
> + attr = kzalloc(sizeof(*attr), GFP_KERNEL);
> + if (!attr)
> + return -ENOMEM;
> +
> + attr->family = "Nuvoton NPCM";
> + attr->soc_id = "WPCM450";
> + attr->revision = revision;
> + soc = soc_device_register(attr);
> + if (IS_ERR(soc)) {
> + kfree(attr);
> + pr_warn("Could not register SoC device\n");
> + return PTR_ERR(soc);
> + }
> +
> + return 0;
> +}
> +device_initcall(wpcm450_soc_init);
> --
> 2.35.1
>
Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de>
Kind regards,
Paul
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH v2] soc: nuvoton: Add SoC info driver for WPCM450
2022-04-09 17:55 ` Paul Menzel
@ 2022-04-14 17:02 ` Jonathan Neuschäfer
0 siblings, 0 replies; 3+ messages in thread
From: Jonathan Neuschäfer @ 2022-04-14 17:02 UTC (permalink / raw)
To: Paul Menzel
Cc: Jonathan Neuschäfer, openbmc, Arnd Bergmann, linux-kernel,
Linus Walleij, Hector Martin, Nicolas Ferre, Conor Dooley,
Joel Stanley
[-- Attachment #1: Type: text/plain, Size: 2384 bytes --]
On Sat, Apr 09, 2022 at 07:55:09PM +0200, Paul Menzel wrote:
> Dear Jonathan,
>
>
> Thank you for your patch.
>
> Am 09.04.22 um 19:33 schrieb Jonathan Neuschäfer:
> > Add a SoC information driver for Nuvoton WPCM450 SoCs. It provides
> > information such as the SoC revision.
>
> Maybe add an example command, how to read the model and revision.
Will do.
>
> > Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
> > Reviewed-by: Joel Stanley <joel@jms.id.au>
> > ---
[...]
> > +#define GCR_PDID 0
> > +#define PDID_CHIP(x) ((x) & 0x00ffffff)
> > +#define CHIP_WPCM450 0x926450
> > +#define PDID_REV(x) ((x) >> 24)
> > +
> > +struct revision {
> > + u8 number;
>
> Can this be just be `unsigned int`s
It could be, but it's unnecessary because I'm dealing with a 8-bit value
here.
The same amount of space is used in the struct whether I declare the
value as unsigned int or as u8, but with u8 it's clearer that it's
really (always) just an 8-bit value.
>
> > + const char *name;
> > +};
> > +
> > +const struct revision revisions[] __initconst = {
Unrelated to your comments, I noticed that this table can and should be
declared static.
> > + { 0x00, "Z1" },
> > + { 0x03, "Z2" },
> > + { 0x04, "Z21" },
> > + { 0x08, "A1" },
> > + { 0x09, "A2" },
> > + { 0x0a, "A3" },
> > + {}
> > +};
> > +
> > +static const char * __init get_revision(u8 rev)
> > +{
> > + int i;
>
> I’d do `unsigned int`, though it does not make a difference in the end
> result.
To avoid unexpected silent truncation that sort of makes sense.
>
> > +
> > + for (i = 0; revisions[i].name; i++)
> > + if (revisions[i].number == rev)
> > + return revisions[i].name;
> > + return NULL;
> > +}
> > +
> > +static int __init wpcm450_soc_init(void)
> > +{
[...]
> > +
> > + revision = get_revision(PDID_REV(pdid));
>
> The signature of `get_revision()` is u8, but you pass u32, if I am not
> mistaken.
The truncation to u8 is fine in this case, because PDID_REV extracts an
8 bit value and the upper 24 bits of the result of PDID_REV are thus
always already zero.
>
> > + if (!revision) {
> > + pr_warn("Unknown chip revision in GCR.PDID: 0x%02x\n", PDID_REV(pdid));
> > + return -ENODEV;
> > + }
[...]
> >
>
> Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de>
Thank you!
Jonathan
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