From: Matthias Kaehlcke <mka@chromium.org>
To: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Cc: agross@kernel.org, bjorn.andersson@linaro.org,
lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org,
quic_plai@quicinc.com, bgoswami@codeaurora.org, perex@perex.cz,
tiwai@suse.com, srinivas.kandagatla@linaro.org,
rohitkr@codeaurora.org, linux-arm-msm@vger.kernel.org,
alsa-devel@alsa-project.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, swboyd@chromium.org,
judyhsiao@chromium.org, Linus Walleij <linus.walleij@linaro.org>,
linux-gpio@vger.kernel.org,
Venkata Prasad Potturu <quic_potturu@quicinc.com>
Subject: Re: [PATCH v12 5/7] pinctrl: qcom: Extract chip specific LPASS LPI code
Date: Fri, 15 Apr 2022 14:39:51 -0700 [thread overview]
Message-ID: <YlnmJz/wjxfkZFua@google.com> (raw)
In-Reply-To: <1647447426-23425-6-git-send-email-quic_srivasam@quicinc.com>
On Wed, Mar 16, 2022 at 09:47:04PM +0530, Srinivasa Rao Mandadapu wrote:
> Extract the chip specific SM8250 data from the LPASS LPI pinctrl driver
> to allow reusing the common code in the addition of subsequent
> platforms.
>
> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
>
> ...
>
> diff --git a/drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c
> new file mode 100644
> index 0000000..8c95d0f
> --- /dev/null
> +++ b/drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c
...
> +
> +/* sm8250 variant specific data */
nit: the comment seems a bit redundant since this is now the sm8250
pinctrl driver.
> +static const struct pinctrl_pin_desc sm8250_lpi_pins[] = {
> + PINCTRL_PIN(0, "gpio0"),
> + PINCTRL_PIN(1, "gpio1"),
> + PINCTRL_PIN(2, "gpio2"),
> + PINCTRL_PIN(3, "gpio3"),
> + PINCTRL_PIN(4, "gpio4"),
> + PINCTRL_PIN(5, "gpio5"),
> + PINCTRL_PIN(6, "gpio6"),
> + PINCTRL_PIN(7, "gpio7"),
> + PINCTRL_PIN(8, "gpio8"),
> + PINCTRL_PIN(9, "gpio9"),
> + PINCTRL_PIN(10, "gpio10"),
> + PINCTRL_PIN(11, "gpio11"),
> + PINCTRL_PIN(12, "gpio12"),
> + PINCTRL_PIN(13, "gpio13"),
> +};
>
> ...
The nit is just a nit and otherwise this looks good to me, so:
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
next prev parent reply other threads:[~2022-04-15 21:41 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-16 16:16 [PATCH v12 0/7] Add pin control support for lpass sc7280 Srinivasa Rao Mandadapu
2022-03-16 16:17 ` [PATCH v12 1/7] dt-bindings: pinctrl: qcom: Update lpass lpi file name to SoC specific Srinivasa Rao Mandadapu
2022-03-16 16:17 ` [PATCH v12 2/7] dt-bindings: pinctrl: qcom: Add sc7280 lpass lpi pinctrl bindings Srinivasa Rao Mandadapu
2022-03-16 16:17 ` [PATCH v12 3/7] pinctrl: qcom: Update macro name to LPI specific Srinivasa Rao Mandadapu
2022-03-16 16:17 ` [PATCH v12 4/7] pinctrl: qcom: Update lpi pin group custiom functions with framework generic functions Srinivasa Rao Mandadapu
2022-04-15 21:10 ` Matthias Kaehlcke
2022-03-16 16:17 ` [PATCH v12 5/7] pinctrl: qcom: Extract chip specific LPASS LPI code Srinivasa Rao Mandadapu
2022-04-15 21:39 ` Matthias Kaehlcke [this message]
2022-04-18 10:20 ` Srinivasa Rao Mandadapu
2022-03-16 16:17 ` [PATCH v12 6/7] pinctrl: qcom: Add SC7280 lpass pin configuration Srinivasa Rao Mandadapu
2022-04-15 23:30 ` Matthias Kaehlcke
2022-04-18 10:22 ` Srinivasa Rao Mandadapu
2022-03-16 16:17 ` [PATCH v12 7/7] pinctrl: qcom: Update clock voting as optional Srinivasa Rao Mandadapu
2022-04-15 23:44 ` Matthias Kaehlcke
2022-04-17 23:32 ` [PATCH v12 0/7] Add pin control support for lpass sc7280 Linus Walleij
2022-04-21 16:38 ` Bjorn Andersson
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