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From: Salvatore Bonaccorso <carnil@debian.org>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: Jeremi Piotrowski <jpiotrowski@linux.microsoft.com>,
	Dusty Mabe <dustymabe@redhat.com>, Stefan Roese <sr@denx.de>,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	Bjorn Helgaas <bhelgaas@google.com>,
	Michal Simek <michal.simek@xilinx.com>,
	Marek Vasut <marex@denx.de>,
	x86@kernel.org, maz@kernel.org,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	Juergen Gross <jgross@suse.com>,
	Noah Meyerhans <noahm@debian.org>
Subject: Re: [tip: irq/urgent] PCI/MSI: Mask MSI-X vectors only on success
Date: Thu, 28 Apr 2022 20:43:07 +0200	[thread overview]
Message-ID: <YmrgO09bqePgiJJd@eldamar.lan> (raw)
In-Reply-To: <87wnf9uxnw.ffs@tglx>

Hi Thomas,

On Thu, Apr 28, 2022 at 03:48:03PM +0200, Thomas Gleixner wrote:
> On Wed, Apr 27 2022 at 19:35, Thomas Gleixner wrote:
> > On Wed, Apr 27 2022 at 09:59, Salvatore Bonaccorso wrote:
> > XEN guests do not use the common PCI mask/unmask machinery which would
> > unmask the interrupt on request_irq().
> >
> > So I assume that the following happens:
> >
> > Guest                     Hypervisor
> >
> > msix_capabilities_init()
> >         ....
> >         alloc_irq()
> >            xen_magic()  -> alloc_msix_interrupt()
> >                            request_irq()
> >
> >         msix_mask_all() -> trap
> >                              do_magic()
> > request_irq()
> >    unmask()
> >      xen_magic()
> >        unmask_evtchn()  -> do_more_magic()
> >
> > So I assume further that msix_mask_all() actually is able to mask the
> > interrupts in the hardware (ctrl word of the vector table) despite the
> > hypervisor having allocated and requested the interrupt already.
> >
> > Nothing in XEN_HVM handles PCI/MSI[-X] mask/unmask in the guest, so I
> > really have to ask why XEN_HVM does not disable PCI/MSI[-X] masking like
> > XEN_PV does. I can only assume the answer is voodoo...
> >
> > Maybe the XEN people have some more enlightened answers to that.
> 
> So I was talking to Juergen about this and he agrees, that for the case
> where a XEN HVM guest uses the PIRQ/Eventchannel mechanism PCI/MSI[-X]
> masking should be disabled like it is done for XEN PV.
> 
> Why the hypervisor grants the mask write is still mysterious, but I
> leave that to the folks who can master the XEN voodoo.
> 
> I'll send out a patch in minute.

Thank you. We are having Noah Meyerhans now testing the patch and he
will report back if it works (Cc'ed here now).

Regards,
Salvatore

  parent reply	other threads:[~2022-04-28 18:43 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20211210161025.3287927-1-sr@denx.de>
2021-12-14 12:28 ` [tip: irq/urgent] PCI/MSI: Mask MSI-X vectors only on success tip-bot2 for Stefan Roese
2022-03-14 16:36   ` Jeremi Piotrowski
2022-03-14 16:49     ` Stefan Roese
2022-03-14 17:04       ` Dusty Mabe
2022-03-14 20:29         ` Jeremi Piotrowski
2022-04-27  7:59           ` Salvatore Bonaccorso
2022-04-27 17:35             ` Thomas Gleixner
2022-04-28 13:48               ` Thomas Gleixner
2022-04-28 13:50                 ` [PATCH] x86/pci/xen: Disable PCI/MSI[-X] masking for XEN_HVM guests Thomas Gleixner
2022-05-01  8:12                   ` [tip: x86/urgent] " tip-bot2 for Thomas Gleixner
2022-04-28 18:43                 ` Salvatore Bonaccorso [this message]
2022-04-29  6:37                   ` [tip: irq/urgent] PCI/MSI: Mask MSI-X vectors only on success Salvatore Bonaccorso

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