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[217.229.24.247]) by smtp.gmail.com with ESMTPSA id v8-20020adfa1c8000000b0020d050461c9sm5287367wrv.54.2022.05.16.07.07.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 May 2022 07:07:15 -0700 (PDT) Date: Mon, 16 May 2022 16:07:13 +0200 From: Thierry Reding To: Mikko Perttunen Cc: Robin Murphy , Will Deacon , jonathanh@nvidia.com, joro@8bytes.org, robh+dt@kernel.org, krzysztof.kozlowski@canonical.com, linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Mikko Perttunen Subject: Re: [PATCH v5 5/9] iommu/arm-smmu: Attach to host1x context device bus Message-ID: References: <20220516085258.1227691-1-cyndis@kapsi.fi> <20220516085258.1227691-6-cyndis@kapsi.fi> <20220516100721.GA1927@willie-the-truck> <4a170997-c893-1788-dcaa-8ed2193146ae@kapsi.fi> <099cf0f9-5c27-0247-7c5e-6704a9527b11@arm.com> <020a8244-760e-fe7c-594a-1d85e5645dbe@kapsi.fi> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="pzcJQLU+ls3tyqds" Content-Disposition: inline In-Reply-To: <020a8244-760e-fe7c-594a-1d85e5645dbe@kapsi.fi> User-Agent: Mutt/2.2.4 (c3baa83e) (2022-04-30) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --pzcJQLU+ls3tyqds Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, May 16, 2022 at 02:20:18PM +0300, Mikko Perttunen wrote: > On 5/16/22 13:44, Robin Murphy wrote: > > On 2022-05-16 11:13, Mikko Perttunen wrote: > > > On 5/16/22 13:07, Will Deacon wrote: > > > > On Mon, May 16, 2022 at 11:52:54AM +0300, cyndis@kapsi.fi wrote: > > > > > From: Mikko Perttunen > > > > >=20 > > > > > Set itself as the IOMMU for the host1x context device bus, contai= ning > > > > > "dummy" devices used for Host1x context isolation. > > > > >=20 > > > > > Signed-off-by: Mikko Perttunen > > > > > --- > > > > > =C2=A0 drivers/iommu/arm/arm-smmu/arm-smmu.c | 13 +++++++++++++ > > > > > =C2=A0 1 file changed, 13 insertions(+) > > > > >=20 > > > > > diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c > > > > > b/drivers/iommu/arm/arm-smmu/arm-smmu.c > > > > > index 568cce590ccc..9ff54eaecf81 100644 > > > > > --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c > > > > > +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c > > > > > @@ -39,6 +39,7 @@ > > > > > =C2=A0 #include > > > > > =C2=A0 #include > > > > > +#include > > > > > =C2=A0 #include "arm-smmu.h" > > > > > @@ -2053,8 +2054,20 @@ static int arm_smmu_bus_init(struct > > > > > iommu_ops *ops) > > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0 goto err_reset_pci_ops; > > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 } > > > > > =C2=A0 #endif > > > > > +#ifdef CONFIG_TEGRA_HOST1X_CONTEXT_BUS > > > > > +=C2=A0=C2=A0=C2=A0 if (!iommu_present(&host1x_context_device_bus= _type)) { > > > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 err =3D bus_set_iommu= (&host1x_context_device_bus_type, ops); > > > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (err) > > > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0 goto err_reset_fsl_mc_ops; > > > > > +=C2=A0=C2=A0=C2=A0 } > > > > > +#endif > > > > > + > > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return 0; > > > > > +err_reset_fsl_mc_ops: __maybe_unused; > > > > > +#ifdef CONFIG_FSL_MC_BUS > > > > > +=C2=A0=C2=A0=C2=A0 bus_set_iommu(&fsl_mc_bus_type, NULL); > > > > > +#endif > > > >=20 > > > > bus_set_iommu() is going away: > > > >=20 > > > > https://lore.kernel.org/r/cover.1650890638.git.robin.murphy@arm.com > > > >=20 > > > > Will > > >=20 > > > Thanks for the heads-up. Robin had pointed out that this work was > > > ongoing but I hadn't seen the patches yet. I'll look into it. > >=20 > > Although that *is* currently blocked on the mystery intel-iommu problem > > that I can't reproduce... If this series is ready to land right now for > > 5.19 then in principle that might be the easiest option overall. > > Hopefully at least patch #2 could sneak in so that the compile-time > > dependencies are ready for me to roll up host1x into the next rebase of > > "iommu: Always register bus notifiers". > >=20 > > Cheers, > > Robin. >=20 > My guess is that the series as a whole is not ready to land in the 5.19 > timeframe, but #2 could be possible. >=20 > Thierry, any opinion? Dave and Daniel typically want new material to be in by -rc6 and I've already sent the PR for this cycle. I can ask them if they'd take another one, though, if it make things simpler for the next cycle. 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