From: Ira Weiny <ira.weiny@intel.com>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: Dan Williams <dan.j.williams@intel.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>,
"Li, Ming" <ming4.li@intel.com>, Lukas Wunner <lukas@wunner.de>,
Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
"Dave Jiang" <dave.jiang@intel.com>,
Ben Widawsky <bwidawsk@kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-cxl@vger.kernel.org>,
<linux-pci@vger.kernel.org>
Subject: Re: [PATCH V13 3/9] PCI: Create PCIe library functions in support of DOE mailboxes.
Date: Mon, 11 Jul 2022 12:13:25 -0700 [thread overview]
Message-ID: <Ysx2VdJJQFWp1oC9@iweiny-desk3> (raw)
In-Reply-To: <20220707162223.GA307520@bhelgaas>
On Thu, Jul 07, 2022 at 11:22:23AM -0500, Bjorn Helgaas wrote:
> On Tue, Jul 05, 2022 at 08:49:26AM -0700, ira.weiny@intel.com wrote:
> > From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
>
> Possible subject:
>
> PCI/DOE: Add DOE mailbox support functions
>
> (no trailing period required)
>
> > Introduced in a PCIe r6.0, sec 6.30, DOE provides a config space based
> > mailbox with standard protocol discovery. Each mailbox is accessed
> > through a DOE Extended Capability.
> >
> > Each DOE mailbox must support the DOE discovery protocol in addition to
> > any number of additional protocols.
> >
> > Define core PCIe functionality to manage a single PCIe DOE mailbox at a
> > defined config space offset. Functionality includes iterating,
> > creating, query of supported protocol, and task submission. Destruction
> > of the mailboxes is device managed.
> >
> > Cc: "Li, Ming" <ming4.li@intel.com>
> > Cc: Bjorn Helgaas <helgaas@kernel.org>
> > Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> > Co-developed-by: Ira Weiny <ira.weiny@intel.com>
> > Signed-off-by: Ira Weiny <ira.weiny@intel.com>
>
> Whenever the CXL folks are happy with this:
>
> Acked-by: Bjorn Helgaas <bhelgaas@google.com>
>
> > +static int pci_doe_recv_resp(struct pci_doe_mb *doe_mb, struct pci_doe_task *task)
> > ...
> > + pci_err(pdev,
> > + "[%x] expected [VID, Protocol] = [%04x, %02x], got [%04x, %02x]\n",
>
> Since the string already wraps, I think there's no benefit to starting
> it on its own line. Joining with "pci_err(pdev, "[%x] ..." improves
> greppability slightly.
>
> > + pci_err(pdev,
> > + "[%x] busy detected; another entity is sending conflicting requests\n",
> > + offset);
>
> Ditto.
>
> > + * pci_doe_submit_task() - Submit a task to be processed by the state machine
> > ...
> > + * RETURNS: 0 when task has been successful queued, -ERRNO on error
>
> successfully
>
> > +int pci_doe_submit_task(struct pci_doe_mb *doe_mb, struct pci_doe_task *task)
> > ...
> > + * DOE requests must be a whole number of DW
> > + * and the response needs to be big enough for at least 1 DW
>
> Rewrap to fill 78 columns or so.
Thanks, I've fixed these up and will submit a 13.1 soon with Willy's change to
xa_mk_value() which he caught from the other thread.
Thanks again for all the review,
Ira
next prev parent reply other threads:[~2022-07-11 19:13 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-05 15:49 [PATCH V13 0/9] CXL: Read CDAT and DSMAS data ira.weiny
2022-07-05 15:49 ` [PATCH V13 1/9] PCI: Add vendor ID for the PCI SIG ira.weiny
2022-07-05 15:49 ` [PATCH V13 2/9] PCI: Replace magic constant for PCI Sig Vendor ID ira.weiny
2022-07-05 15:49 ` [PATCH V13 3/9] PCI: Create PCIe library functions in support of DOE mailboxes ira.weiny
2022-07-07 16:22 ` Bjorn Helgaas
2022-07-11 19:13 ` Ira Weiny [this message]
2022-07-11 22:27 ` [PATCH V13.1] PCI/DOE: Add DOE mailbox support functions ira.weiny
2022-07-11 22:47 ` Matthew Wilcox
2022-07-14 14:54 ` Ira Weiny
2022-07-14 3:16 ` [PATCH V13 3/9] PCI: Create PCIe library functions in support of DOE mailboxes Dan Williams
2022-07-14 14:19 ` Ira Weiny
2022-07-05 15:49 ` [PATCH V13 4/9] cxl/pci: Create PCI DOE mailbox's for memory devices ira.weiny
2022-07-14 3:30 ` Dan Williams
2022-07-14 18:50 ` Ira Weiny
2022-07-05 15:49 ` [PATCH V13 5/9] driver-core: Introduce BIN_ATTR_ADMIN_{RO,RW} ira.weiny
2022-07-05 15:49 ` [PATCH V13 6/9] cxl/port: Read CDAT table ira.weiny
2022-07-14 15:38 ` Dan Williams
2022-07-14 19:55 ` Ira Weiny
2022-07-14 20:19 ` Dan Williams
2022-07-15 1:09 ` Ira Weiny
2022-07-05 15:49 ` [PATCH V13 7/9] cxl/port: Introduce cxl_cdat_valid() ira.weiny
2022-07-14 16:05 ` Dan Williams
2022-07-05 15:49 ` [PATCH V13 8/9] cxl/port: Retry reading CDAT on failure ira.weiny
2022-07-14 16:27 ` Dan Williams
2022-07-14 20:05 ` Ira Weiny
2022-07-14 20:13 ` Ira Weiny
2022-07-14 20:44 ` Dan Williams
2022-07-19 15:07 ` Jonathan Cameron
2022-07-05 15:49 ` [PATCH V13 9/9] cxl/port: Parse out DSMAS data from CDAT table ira.weiny
2022-07-14 16:32 ` Dan Williams
2022-07-14 19:58 ` Ira Weiny
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