From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E4388C19F2D for ; Sat, 6 Aug 2022 09:11:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238561AbiHFJLg (ORCPT ); Sat, 6 Aug 2022 05:11:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33956 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230013AbiHFJLd (ORCPT ); Sat, 6 Aug 2022 05:11:33 -0400 Received: from mail.skyhub.de (mail.skyhub.de [IPv6:2a01:4f8:190:11c2::b:1457]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ABB3E16583 for ; Sat, 6 Aug 2022 02:11:31 -0700 (PDT) Received: from zn.tnic (p200300ea971b986e329c23fffea6a903.dip0.t-ipconnect.de [IPv6:2003:ea:971b:986e:329c:23ff:fea6:a903]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.skyhub.de (SuperMail on ZX Spectrum 128k) with ESMTPSA id EABCE1EC064A; Sat, 6 Aug 2022 11:11:24 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alien8.de; s=dkim; t=1659777085; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:in-reply-to:in-reply-to: references:references; bh=K/JEm6qsqObxv5k42BECF3rRNZFaVIF4KqwrFKnMaTk=; b=XUEJgqyqcfRJVUKXij21BB7HfTe+CT2HIFR7YHWoac0g6o0m/9Mxr1yniLLpJ1x+NuUD8x UEBPe9/wfWtWgVinboUYy/5nmBvx/wDfh0QpUcYlmxGBBHf41t1lm8Sa+qT/EsPv4FCzJh Ufd9ifoHtmKkvU1ZTpi2CgwYvhTx5Zs= Date: Sat, 6 Aug 2022 11:11:20 +0200 From: Borislav Petkov To: Ingo Molnar Cc: Dave Hansen , ira.weiny@intel.com, Rik van Riel , x86@kernel.org, linux-kernel@vger.kernel.org, kernel-team@fb.com Subject: Re: [RFC PATCH 5/5] x86/entry: Store CPU info on exception entry Message-ID: References: <20220805173009.3128098-1-ira.weiny@intel.com> <20220805173009.3128098-6-ira.weiny@intel.com> <5d62c1d0-7425-d5bb-ecb5-1dc3b4d7d245@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Aug 06, 2022 at 11:01:06AM +0200, Ingo Molnar wrote: > It's still 2 instructions more than what we had before, while the > fault-time CPU number is only needed infrequently AFAICS. With the amount of logical cores ever increasing and how CPU packages (nodes, L3 sharing, you name it) get more and more complex topology, I'd say the 2 insns to show the CPU number in every exception is a good thing to do. Arguably, we probably should've even done it already... -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette