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[195.38.112.141]) by smtp.gmail.com with ESMTPSA id jw16-20020a170906e95000b00726298147b1sm4815522ejb.161.2022.08.08.04.03.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Aug 2022 04:03:26 -0700 (PDT) Sender: Ingo Molnar Date: Mon, 8 Aug 2022 13:03:24 +0200 From: Ingo Molnar To: Ira Weiny , Andy Lutomirski Cc: Borislav Petkov , Dave Hansen , Rik van Riel , x86@kernel.org, linux-kernel@vger.kernel.org, kernel-team@fb.com Subject: Re: [RFC PATCH 5/5] x86/entry: Store CPU info on exception entry Message-ID: References: <20220805173009.3128098-1-ira.weiny@intel.com> <20220805173009.3128098-6-ira.weiny@intel.com> <5d62c1d0-7425-d5bb-ecb5-1dc3b4d7d245@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Ira Weiny wrote: > On Sun, Aug 07, 2022 at 12:35:03PM +0200, Borislav Petkov wrote: > > On Sun, Aug 07, 2022 at 12:02:41PM +0200, Ingo Molnar wrote: > > > * Borislav Petkov wrote: > > > > With the amount of logical cores ever increasing and how CPU packages > > > > (nodes, L3 sharing, you name it) get more and more complex topology, > > > > I'd say the 2 insns to show the CPU number in every exception is a good > > > > thing to do. > > > > > > We can show it - I'm arguing against extracting it too early, which costs > > > > Not early - more correct. We can say which CPU executed the exception > > handler *exactly*. Not which CPU executed the exception handler *maybe*. > > > > > us 2 instructions in the exception fast path > > > > 2 insns? They don't matter at all. FWIW, they'll pull in the per-CPU > > cacheline earlier which should be a net win later, for code which does > > smp_processor_id(). I'd like to hear what Andy Lutomirski thinks about the notion that "2 instructions don't matter at all" ... Especially since it's now 4 instructions: > I agree with Boris; however I feel that I have to mention that in patch > 3/5 you also have 1 instruction on each of entry and exit to push the > extra stack space. So all told it would cost 4 instructions. ... 4 instructions in the exception path is a non-trivial impact. > Again, I don't believe this is too much overhead but I don't want people > to say it was not discussed. Is it necessary to do this, what are the alternatives, can this overhead be avoided? Thanks, Ingo