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From: Andi Shyti <andi.shyti@linux.intel.com>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: "Andi Shyti" <andi.shyti@linux.intel.com>,
	"Mauro Carvalho Chehab" <mchehab@kernel.org>,
	"Michael Cheng" <michael.cheng@intel.com>,
	"Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
	"David Airlie" <airlied@linux.ie>,
	dri-devel@lists.freedesktop.org,
	"Lucas De Marchi" <lucas.demarchi@intel.com>,
	linux-kernel@vger.kernel.org,
	"Chris Wilson" <chris.p.wilson@intel.com>,
	"Daniel Vetter" <daniel@ffwll.ch>,
	intel-gfx@lists.freedesktop.org,
	"Matthew Auld" <matthew.auld@intel.com>
Subject: Re: [Intel-gfx] [PATCH v3 1/3] drm/i915: pass a pointer for tlb seqno at vma_invalidate_tlb()
Date: Tue, 9 Aug 2022 01:09:51 +0200	[thread overview]
Message-ID: <YvGXv5td47ky+CnY@alfio.lan> (raw)
In-Reply-To: <YvFeLbUcC6yiCL5G@intel.com>

Hi Rodrigo,

On Mon, Aug 08, 2022 at 03:04:13PM -0400, Rodrigo Vivi wrote:
> On Mon, Aug 08, 2022 at 06:37:58PM +0200, Andi Shyti wrote:
> > Hi Mauro,
> > 
> > On Thu, Aug 04, 2022 at 09:37:22AM +0200, Mauro Carvalho Chehab wrote:
> > > WRITE_ONCE() should happen at the original var, not on a local
> > > copy of it.
> > > 
> > > Fixes: 5d36acb7198b ("drm/i915/gt: Batch TLB invalidations")
> > > Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
> > 
> > Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
> 
> Thanks and pushed...

Thanks!

> > 
> > Are you going to send it to the stable mailing list?
> 
> I added cc stable while pushing and the cherry-pick to drm-intel-next-fixes
> has the right sha, so I'd assume this would be automagically now.
> But yeap, it would be good if Mauro can follow up whenever this gets
> to Linus tree and Greg's script start to pop up the heads-up messages.

That's what I meant... does Mauro now need to send the e-mail
again for the stable?

I thought there was some suspicion towards e-mails pushed without
being first sent to both stable and upstream mailing lists
because they can get lost or forgotten... maybe I'm wrong.

Andi

> Thanks,
> Rodrigo.
> 
> > 
> > Andi

  reply	other threads:[~2022-08-08 23:10 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-04  7:37 [PATCH v3 0/3] Move TLB invalidation code for its own file and document it Mauro Carvalho Chehab
2022-08-04  7:37 ` [PATCH v3 1/3] drm/i915: pass a pointer for tlb seqno at vma_invalidate_tlb() Mauro Carvalho Chehab
2022-08-04  8:18   ` Tvrtko Ursulin
2022-08-08 16:37   ` Andi Shyti
2022-08-08 19:04     ` [Intel-gfx] " Rodrigo Vivi
2022-08-08 23:09       ` Andi Shyti [this message]
2022-08-09  0:15         ` Vivi, Rodrigo
2022-08-09  6:29           ` Mauro Carvalho Chehab
2022-08-04  7:37 ` [PATCH v3 2/3] drm/i915/gt: Move TLB invalidation to its own file Mauro Carvalho Chehab
2022-08-04  7:37 ` [PATCH v3 3/3] drm/i915/gt: document TLB cache invalidation functions Mauro Carvalho Chehab
2022-08-04 19:00   ` Randy Dunlap
2022-08-05  9:08     ` Andi Shyti
2022-08-05  9:24       ` Tvrtko Ursulin
2022-08-05 10:30         ` [Intel-gfx] " Mauro Carvalho Chehab
2022-08-08 16:58   ` Andi Shyti

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