From: Peter Zijlstra <peterz@infradead.org>
To: "Liang, Kan" <kan.liang@linux.intel.com>
Cc: Like Xu <like.xu.linux@gmail.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Sean Christopherson <seanjc@google.com>,
Jim Mattson <jmattson@google.com>,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Subject: Re: [PATCH v2 1/7] perf/x86/core: Update x86_pmu.pebs_capable for ICELAKE_{X,D}
Date: Mon, 15 Aug 2022 16:30:03 +0200 [thread overview]
Message-ID: <YvpYa+YagI/7x9MU@worktop.programming.kicks-ass.net> (raw)
In-Reply-To: <952632db-b090-ceb9-1467-a6b598ca2b02@linux.intel.com>
On Mon, Aug 15, 2022 at 09:06:01AM -0400, Liang, Kan wrote:
> Goldmont Plus should be the only platform which supports extended PEBS
> but doesn't have Baseline.
Like so then...
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 2db93498ff71..cb98a05ee743 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -6291,10 +6291,8 @@ __init int intel_pmu_init(void)
x86_pmu.pebs_aliases = NULL;
x86_pmu.pebs_prec_dist = true;
x86_pmu.pebs_block = true;
- x86_pmu.pebs_capable = ~0ULL;
x86_pmu.flags |= PMU_FL_HAS_RSP_1;
x86_pmu.flags |= PMU_FL_NO_HT_SHARING;
- x86_pmu.flags |= PMU_FL_PEBS_ALL;
x86_pmu.flags |= PMU_FL_INSTR_LATENCY;
x86_pmu.flags |= PMU_FL_MEM_LOADS_AUX;
@@ -6337,10 +6335,8 @@ __init int intel_pmu_init(void)
x86_pmu.pebs_aliases = NULL;
x86_pmu.pebs_prec_dist = true;
x86_pmu.pebs_block = true;
- x86_pmu.pebs_capable = ~0ULL;
x86_pmu.flags |= PMU_FL_HAS_RSP_1;
x86_pmu.flags |= PMU_FL_NO_HT_SHARING;
- x86_pmu.flags |= PMU_FL_PEBS_ALL;
x86_pmu.flags |= PMU_FL_INSTR_LATENCY;
x86_pmu.flags |= PMU_FL_MEM_LOADS_AUX;
x86_pmu.lbr_pt_coexist = true;
diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
index ba60427caa6d..ac6dd4c96dbc 100644
--- a/arch/x86/events/intel/ds.c
+++ b/arch/x86/events/intel/ds.c
@@ -2262,6 +2262,7 @@ void __init intel_ds_init(void)
PERF_SAMPLE_BRANCH_STACK |
PERF_SAMPLE_TIME;
x86_pmu.flags |= PMU_FL_PEBS_ALL;
+ x86_pmu.pebs_capable = ~0ULL;
pebs_qual = "-baseline";
x86_get_pmu(smp_processor_id())->capabilities |= PERF_PMU_CAP_EXTENDED_REGS;
} else {
next prev parent reply other threads:[~2022-08-15 14:30 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-21 10:35 [PATCH v2 0/7] KVM: x86/pmu: Fix some corner cases including Intel PEBS Like Xu
2022-07-21 10:35 ` [PATCH v2 1/7] perf/x86/core: Update x86_pmu.pebs_capable for ICELAKE_{X,D} Like Xu
2022-08-12 7:52 ` Paolo Bonzini
2022-08-15 9:31 ` Peter Zijlstra
2022-08-15 9:43 ` Like Xu
2022-08-15 11:51 ` Peter Zijlstra
2022-08-15 12:48 ` Like Xu
2022-08-15 13:14 ` Peter Zijlstra
2022-08-15 13:06 ` Liang, Kan
2022-08-15 14:30 ` Peter Zijlstra [this message]
2022-08-16 11:57 ` Like Xu
2022-07-21 10:35 ` [PATCH v2 2/7] perf/x86/core: Completely disable guest PEBS via guest's global_ctrl Like Xu
2022-07-21 10:35 ` [PATCH v2 3/7] KVM: x86/pmu: Avoid setting BIT_ULL(-1) to pmu->host_cross_mapped_mask Like Xu
2022-07-21 10:35 ` [PATCH v2 4/7] KVM: x86/pmu: Don't generate PEBS records for emulated instructions Like Xu
2022-07-21 10:35 ` [PATCH v2 5/7] KVM: x86/pmu: Avoid using PEBS perf_events for normal counters Like Xu
2022-07-21 10:35 ` [PATCH v2 6/7] KVM: x86/pmu: Defer reprogram_counter() to kvm_pmu_handle_event() Like Xu
2022-07-21 10:35 ` [PATCH v2 7/7] KVM: x86/pmu: Defer counter emulated overflow via pmc->stale_counter Like Xu
2022-07-21 10:35 ` [kvm-unit-tests PATCH] x86: Add tests for Guest Processor Event Based Sampling (PEBS) Like Xu
2022-07-27 22:42 ` Sean Christopherson
2022-07-28 11:31 ` Like Xu
2022-08-02 11:07 ` [PATCH v2 0/7] KVM: x86/pmu: Fix some corner cases including Intel PEBS Like Xu
2022-08-11 7:10 ` Wanpeng Li
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