From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Rengarajan S <rengarajan.s@microchip.com>
Cc: kumaravel.thiagarajan@microchip.com,
tharunkumar.pasumarthi@microchip.com, gregkh@linuxfoundation.org,
jirislaby@kernel.org, ilpo.jarvinen@linux.intel.com,
f.fainelli@gmail.com, john.ogness@linutronix.de,
tony@atomide.com, tglx@linutronix.de,
jiaqing.zhao@linux.intel.com, linux-serial@vger.kernel.org,
linux-kernel@vger.kernel.org, UNGLinuxDriver@microchip.com
Subject: Re: [PATCH v1 tty] 8250: microchip: Add 4 Mbps support in PCI1XXXX UART
Date: Sun, 28 Jan 2024 17:27:23 +0200 [thread overview]
Message-ID: <ZbZyW_g4OOkCqIxf@smile.fi.intel.com> (raw)
In-Reply-To: <20240125100619.154873-1-rengarajan.s@microchip.com>
On Thu, Jan 25, 2024 at 03:36:19PM +0530, Rengarajan S wrote:
> The current clock input is set to 62.5 MHz for supporting fractional
> divider, which enables generation of an acceptable baud rate from any
> frequency. With the current clock input the baud rate range is limited
> to 3.9 Mbps. Hence, the current range is extended to support 4 Mbps
> with Burst mode operation. Divisor calculation for a given baud rate is
> updated as the sampling rate is reduced from 16 to 8 for 4 Mbps.
...
> +#define UART_BAUD_4MBPS 4000000
(4 * MEGA) ? (will need to include units.h, if not yet)
...
> + frac_div = readl(port->membase + FRAC_DIV_CFG_REG);
> +
Unneeded blank line.
> + if (frac_div == UART_BIT_DIVISOR_16)
> + sample_cnt = UART_BIT_SAMPLE_CNT_16;
> + else
> + sample_cnt = UART_BIT_SAMPLE_CNT_8;
...
> + /*
> + * Microchip PCI1XXXX UART supports maximum baud rate up to 4 Mbps
> + */
> + if (up->port.type == PORT_MCHP16550A)
> + max = 4000000;
No. Please refactor the way the 8250_port won't be modified.
Also you have a define for this constant, use it.
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2024-01-28 15:27 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-25 10:06 [PATCH v1 tty] 8250: microchip: Add 4 Mbps support in PCI1XXXX UART Rengarajan S
2024-01-28 15:27 ` Andy Shevchenko [this message]
2024-01-28 15:28 ` Andy Shevchenko
2024-01-30 10:52 ` Rengarajan.S
2024-02-01 11:52 ` Andy Shevchenko
2024-02-08 2:53 ` Rengarajan.S
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