From: Frank Li <Frank.li@nxp.com>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: "Jingoo Han" <jingoohan1@gmail.com>,
"Gustavo Pimentel" <gustavo.pimentel@synopsys.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Marek Vasut" <marek.vasut+renesas@gmail.com>,
"Yoshihiro Shimoda" <yoshihiro.shimoda.uh@renesas.com>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Serge Semin" <fancer.lancer@gmail.com>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-renesas-soc@vger.kernel.org, linux-arm-msm@vger.kernel.org,
mhi@lists.linux.dev
Subject: Re: [PATCH v3 1/5] PCI: dwc: Refactor dw_pcie_edma_find_chip() API
Date: Mon, 26 Feb 2024 11:24:31 -0500 [thread overview]
Message-ID: <Zdy7PxDO7d8YIKG2@lizhi-Precision-Tower-5810> (raw)
In-Reply-To: <20240226-dw-hdma-v3-1-cfcb8171fc24@linaro.org>
On Mon, Feb 26, 2024 at 05:07:26PM +0530, Manivannan Sadhasivam wrote:
> In order to add support for Hyper DMA (HDMA), let's refactor the existing
> dw_pcie_edma_find_chip() API by moving the common code to separate
> functions.
>
> No functional change.
>
> Suggested-by: Serge Semin <fancer.lancer@gmail.com>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
> ---
> drivers/pci/controller/dwc/pcie-designware.c | 52 +++++++++++++++++++++-------
> 1 file changed, 39 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
> index 250cf7f40b85..193fcd86cf93 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.c
> +++ b/drivers/pci/controller/dwc/pcie-designware.c
> @@ -880,7 +880,17 @@ static struct dw_edma_plat_ops dw_pcie_edma_ops = {
> .irq_vector = dw_pcie_edma_irq_vector,
> };
>
> -static int dw_pcie_edma_find_chip(struct dw_pcie *pci)
> +static void dw_pcie_edma_init_data(struct dw_pcie *pci)
> +{
> + pci->edma.dev = pci->dev;
> +
> + if (!pci->edma.ops)
> + pci->edma.ops = &dw_pcie_edma_ops;
> +
> + pci->edma.flags |= DW_EDMA_CHIP_LOCAL;
> +}
> +
> +static int dw_pcie_edma_find_mf(struct dw_pcie *pci)
> {
> u32 val;
>
> @@ -900,24 +910,27 @@ static int dw_pcie_edma_find_chip(struct dw_pcie *pci)
> else
> val = dw_pcie_readl_dbi(pci, PCIE_DMA_VIEWPORT_BASE + PCIE_DMA_CTRL);
>
> - if (val == 0xFFFFFFFF && pci->edma.reg_base) {
> - pci->edma.mf = EDMA_MF_EDMA_UNROLL;
> -
> - val = dw_pcie_readl_dma(pci, PCIE_DMA_CTRL);
> - } else if (val != 0xFFFFFFFF) {
> - pci->edma.mf = EDMA_MF_EDMA_LEGACY;
> + /* Set default mapping format here and update it below if needed */
> + pci->edma.mf = EDMA_MF_EDMA_LEGACY;
>
> + if (val == 0xFFFFFFFF && pci->edma.reg_base)
> + pci->edma.mf = EDMA_MF_EDMA_UNROLL;
> + else if (val != 0xFFFFFFFF)
> pci->edma.reg_base = pci->dbi_base + PCIE_DMA_VIEWPORT_BASE;
> - } else {
> + else
> return -ENODEV;
> - }
>
> - pci->edma.dev = pci->dev;
> + return 0;
> +}
>
> - if (!pci->edma.ops)
> - pci->edma.ops = &dw_pcie_edma_ops;
> +static int dw_pcie_edma_find_channels(struct dw_pcie *pci)
> +{
> + u32 val;
>
> - pci->edma.flags |= DW_EDMA_CHIP_LOCAL;
> + if (pci->edma.mf == EDMA_MF_EDMA_LEGACY)
> + val = dw_pcie_readl_dbi(pci, PCIE_DMA_VIEWPORT_BASE + PCIE_DMA_CTRL);
> + else
> + val = dw_pcie_readl_dma(pci, PCIE_DMA_CTRL);
>
> pci->edma.ll_wr_cnt = FIELD_GET(PCIE_DMA_NUM_WR_CHAN, val);
> pci->edma.ll_rd_cnt = FIELD_GET(PCIE_DMA_NUM_RD_CHAN, val);
> @@ -930,6 +943,19 @@ static int dw_pcie_edma_find_chip(struct dw_pcie *pci)
> return 0;
> }
>
> +static int dw_pcie_edma_find_chip(struct dw_pcie *pci)
> +{
> + int ret;
> +
> + dw_pcie_edma_init_data(pci);
> +
> + ret = dw_pcie_edma_find_mf(pci);
> + if (ret)
> + return ret;
> +
> + return dw_pcie_edma_find_channels(pci);
> +}
> +
> static int dw_pcie_edma_irq_verify(struct dw_pcie *pci)
> {
> struct platform_device *pdev = to_platform_device(pci->dev);
>
> --
> 2.25.1
>
next prev parent reply other threads:[~2024-02-26 16:24 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-26 11:37 [PATCH v3 0/5] PCI: dwc: Add support for integrating HDMA with DWC EP driver Manivannan Sadhasivam
2024-02-26 11:37 ` [PATCH v3 1/5] PCI: dwc: Refactor dw_pcie_edma_find_chip() API Manivannan Sadhasivam
2024-02-26 12:02 ` Siddharth Vadapalli
2024-02-26 12:45 ` Serge Semin
2024-02-26 15:27 ` Manivannan Sadhasivam
2024-02-26 21:00 ` Serge Semin
2024-02-27 7:34 ` Manivannan Sadhasivam
2024-02-26 16:24 ` Frank Li [this message]
2024-02-26 11:37 ` [PATCH v3 2/5] PCI: dwc: Skip finding eDMA channels count if glue drivers have passed them Manivannan Sadhasivam
2024-02-26 12:53 ` Serge Semin
2024-02-26 15:30 ` Manivannan Sadhasivam
2024-02-26 21:32 ` Serge Semin
2024-02-27 8:42 ` Manivannan Sadhasivam
2024-02-27 12:21 ` Serge Semin
2024-03-04 6:17 ` Manivannan Sadhasivam
2024-02-26 16:26 ` Frank Li
2024-02-26 11:37 ` [PATCH v3 3/5] PCI: dwc: Pass the eDMA mapping format flag directly from glue drivers Manivannan Sadhasivam
2024-02-26 12:57 ` Serge Semin
2024-02-26 16:30 ` Frank Li
2024-02-27 7:45 ` Manivannan Sadhasivam
2024-02-27 17:38 ` Frank Li
2024-03-04 6:19 ` Manivannan Sadhasivam
2024-02-26 11:37 ` [PATCH v3 4/5] PCI: qcom-ep: Add HDMA support for SA8775P SoC Manivannan Sadhasivam
2024-02-26 16:32 ` Frank Li
2024-02-26 11:37 ` [PATCH v3 5/5] PCI: epf-mhi: Enable HDMA " Manivannan Sadhasivam
2024-02-26 16:34 ` Frank Li
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