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AJvYcCWhXaAQlsRlI+qzuGIXvYsAHgB60UHKEi9bMyFFRWMwBKik3hU+AQcjLssu1xfHV0dN/DWZ+0iMOM736NfYufqU49HKsfFMt9xkgFiM X-Gm-Message-State: AOJu0YyDsakA+PeN/yF//r4635cEhOpUziab/cFbTVoydybQ3SZxoYNb dCTR26B5/A5d7vWWOM1FWa1Smovd9MzwHwbzL+wKH0F/Wxlne5uJ2u/3yc7XdeRy0qM92nrfccB x6g== X-Google-Smtp-Source: AGHT+IGjd/wZeQUhZLyTS0Xx1LwVv3UAkSQJSyzs5lVC5PbTqHzOKCCE7HCzaV0S5Lrgz5YAgiEzWE4t4tM= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:90b:3908:b0:29b:a22:5bc2 with SMTP id ob8-20020a17090b390800b0029b0a225bc2mr92471pjb.1.1709219835396; Thu, 29 Feb 2024 07:17:15 -0800 (PST) Date: Thu, 29 Feb 2024 07:17:14 -0800 In-Reply-To: <063aa825af395439cc1b3669fb326c395bd6fe42.camel@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20240228024147.41573-1-seanjc@google.com> <20240228024147.41573-6-seanjc@google.com> <063aa825af395439cc1b3669fb326c395bd6fe42.camel@intel.com> Message-ID: Subject: Re: [PATCH 05/16] KVM: x86/mmu: Use synthetic page fault error code to indicate private faults From: Sean Christopherson To: Kai Huang Cc: "pbonzini@redhat.com" , "yu.c.zhang@linux.intel.com" , "chao.p.peng@linux.intel.com" , "linux-kernel@vger.kernel.org" , "tabba@google.com" , Yan Y Zhao , "kvm@vger.kernel.org" , "michael.roth@amd.com" , Isaku Yamahata , "dmatlack@google.com" Content-Type: text/plain; charset="us-ascii" On Thu, Feb 29, 2024, Kai Huang wrote: > > > diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c > > index 408969ac1291..7807bdcd87e8 100644 > > --- a/arch/x86/kvm/mmu/mmu.c > > +++ b/arch/x86/kvm/mmu/mmu.c > > @@ -5839,19 +5839,31 @@ int noinline kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 err > > bool direct = vcpu->arch.mmu->root_role.direct; > > > > /* > > - * IMPLICIT_ACCESS is a KVM-defined flag used to correctly perform SMAP > > - * checks when emulating instructions that triggers implicit access. > > * WARN if hardware generates a fault with an error code that collides > > - * with the KVM-defined value. Clear the flag and continue on, i.e. > > - * don't terminate the VM, as KVM can't possibly be relying on a flag > > - * that KVM doesn't know about. > > + * with KVM-defined sythentic flags. Clear the flags and continue on, > > + * i.e. don't terminate the VM, as KVM can't possibly be relying on a > > + * flag that KVM doesn't know about. > > */ > > - if (WARN_ON_ONCE(error_code & PFERR_IMPLICIT_ACCESS)) > > - error_code &= ~PFERR_IMPLICIT_ACCESS; > > + if (WARN_ON_ONCE(error_code & PFERR_SYNTHETIC_MASK)) > > + error_code &= ~PFERR_SYNTHETIC_MASK; > > > > Hmm.. I thought for TDX the caller -- handle_ept_violation() -- should > explicitly set the PFERR_PRIVATE_ACCESS so that here the fault handler can > figure out the fault is private. > > Now it seems the caller should never pass PFERR_PRIVATE_ACCESS, then ... > > > if (WARN_ON_ONCE(!VALID_PAGE(vcpu->arch.mmu->root.hpa))) > > return RET_PF_RETRY; > > > > + /* > > + * Except for reserved faults (emulated MMIO is shared-only), set the > > + * private flag for software-protected VMs based on the gfn's current > > + * attributes, which are the source of truth for such VMs. Note, this > > + * wrong for nested MMUs as the GPA is an L2 GPA, but KVM doesn't > > + * currently supported nested virtualization (among many other things) > > + * for software-protected VMs. > > + */ > > + if (IS_ENABLED(CONFIG_KVM_SW_PROTECTED_VM) && > > + !(error_code & PFERR_RSVD_MASK) && > > + vcpu->kvm->arch.vm_type == KVM_X86_SW_PROTECTED_VM && > > + kvm_mem_is_private(vcpu->kvm, gpa_to_gfn(cr2_or_gpa))) > > + error_code |= PFERR_PRIVATE_ACCESS; > > + > > > > ... I am wondering how we figure out whether a fault is private for TDX? Read the next few patches :-) The sanity check gets moved to the legacy #PF handler (any error code with bits 63:32!=0 yells) and SVM's #NPF handler (error code with synthetic bits set yells), leaving VMX free and clear to stuff PFERR_PRIVATE_ACCESS as appropriate.