Re: [PATCH v21 4/9] usb: dwc3: core: Refactor PHY logic to support Multiport Controller

From: Johan Hovold <johan@kernel.org>
To: Krishna Kurapati <quic_kriskura@quicinc.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Rob Herring <robh@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Wesley Cheng <quic_wcheng@quicinc.com>,
	Konrad Dybcio <konrad.dybcio@linaro.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Thinh Nguyen <Thinh.Nguyen@synopsys.com>,
	Felipe Balbi <balbi@kernel.org>,
	devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org,
	quic_ppratap@quicinc.com, quic_jackp@quicinc.com,
	Bjorn Andersson <quic_bjorande@quicinc.com>
Subject: Re: [PATCH v21 4/9] usb: dwc3: core: Refactor PHY logic to support Multiport Controller
Date: Mon, 22 Apr 2024 09:10:32 +0200	[thread overview]
Message-ID: <ZiYNaJ8rwz6DXUGT@hovoldconsulting.com> (raw)
In-Reply-To: <20240420044901.884098-5-quic_kriskura@quicinc.com>

On Sat, Apr 20, 2024 at 10:18:56AM +0530, Krishna Kurapati wrote:
> Currently the DWC3 driver supports only single port controller
> which requires at least one HS PHY and at most one SS PHY.
> 
> But the DWC3 USB controller can be connected to multiple ports and
> each port can have their own PHYs. Each port of the multiport
> controller can either be HS+SS capable or HS only capable
> Proper quantification of them is required to modify GUSB2PHYCFG
> and GUSB3PIPECTL registers appropriately.
> 
> DWC3 multiport controllers are capable to service at most 15 High Speed
> PHYs and 4 Supser Speed PHYs. Add support for detecting, obtaining and
> configuring PHYs supported by a multiport controller.
> 
> Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
> Reviewed-by: Bjorn Andersson <quic_bjorande@quicinc.com>

Reviewed-by: Johan Hovold <johan+linaro@kernel.org>