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From: Huang Rui <ray.huang@amd.com>
To: "Yuan, Perry" <Perry.Yuan@amd.com>
Cc: "rafael.j.wysocki@intel.com" <rafael.j.wysocki@intel.com>,
	"Limonciello, Mario" <Mario.Limonciello@amd.com>,
	"viresh.kumar@linaro.org" <viresh.kumar@linaro.org>,
	"Shenoy, Gautham Ranjal" <gautham.shenoy@amd.com>,
	"Petkov, Borislav" <Borislav.Petkov@amd.com>,
	"Deucher, Alexander" <Alexander.Deucher@amd.com>,
	"Huang, Shimmer" <Shimmer.Huang@amd.com>,
	"oleksandr@natalenko.name" <oleksandr@natalenko.name>,
	"Du, Xiaojian" <Xiaojian.Du@amd.com>,
	"Meng, Li (Jassmine)" <Li.Meng@amd.com>,
	"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v7 1/6] cpufreq: acpi: move MSR_K7_HWCR_CPB_DIS_BIT into msr-index.h
Date: Tue, 23 Apr 2024 18:40:48 +0800	[thread overview]
Message-ID: <ZieQMCzz+VUMcWya@amd.com> (raw)
In-Reply-To: <858950a317b7093df72142d227c686290ba9eda5.1713861200.git.perry.yuan@amd.com>

On Tue, Apr 23, 2024 at 04:40:54PM +0800, Yuan, Perry wrote:
> There are some other drivers also need to use the
> MSR_K7_HWCR_CPB_DIS_BIT for CPB control bit, so it makes sense to move
> the definition to a common header file to allow other driver to use it.
> 
> No intentional functional impact.
> 
> Suggested-by: Gautham Ranjal Shenoy <gautham.shenoy@amd.com>
> Signed-off-by: Perry Yuan <perry.yuan@amd.com>
> Acked-by: Rafael J. Wysocki <rafael@kernel.org>

Acked-by: Huang Rui <ray.huang@amd.com>

> ---
>  arch/x86/include/asm/msr-index.h | 2 ++
>  drivers/cpufreq/acpi-cpufreq.c   | 2 --
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
> index e72c2b872957..8738a7b3917d 100644
> --- a/arch/x86/include/asm/msr-index.h
> +++ b/arch/x86/include/asm/msr-index.h
> @@ -782,6 +782,8 @@
>  #define MSR_K7_HWCR_IRPERF_EN		BIT_ULL(MSR_K7_HWCR_IRPERF_EN_BIT)
>  #define MSR_K7_FID_VID_CTL		0xc0010041
>  #define MSR_K7_FID_VID_STATUS		0xc0010042
> +#define MSR_K7_HWCR_CPB_DIS_BIT		25
> +#define MSR_K7_HWCR_CPB_DIS		BIT_ULL(MSR_K7_HWCR_CPB_DIS_BIT)
>  
>  /* K6 MSRs */
>  #define MSR_K6_WHCR			0xc0000082
> diff --git a/drivers/cpufreq/acpi-cpufreq.c b/drivers/cpufreq/acpi-cpufreq.c
> index 37f1cdf46d29..2fc82831bddd 100644
> --- a/drivers/cpufreq/acpi-cpufreq.c
> +++ b/drivers/cpufreq/acpi-cpufreq.c
> @@ -50,8 +50,6 @@ enum {
>  #define AMD_MSR_RANGE		(0x7)
>  #define HYGON_MSR_RANGE		(0x7)
>  
> -#define MSR_K7_HWCR_CPB_DIS	(1ULL << 25)
> -
>  struct acpi_cpufreq_data {
>  	unsigned int resume;
>  	unsigned int cpu_feature;
> -- 
> 2.34.1
> 

  reply	other threads:[~2024-04-23 10:41 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-23  8:40 [PATCH v7 0/6] AMD Pstate Driver Core Performance Boost Perry Yuan
2024-04-23  8:40 ` [PATCH v7 1/6] cpufreq: acpi: move MSR_K7_HWCR_CPB_DIS_BIT into msr-index.h Perry Yuan
2024-04-23 10:40   ` Huang Rui [this message]
2024-04-23  8:40 ` [PATCH v7 2/6] cpufreq: amd-pstate: initialize new core precision boost state Perry Yuan
2024-04-23 10:51   ` Huang Rui
2024-04-23  8:40 ` [PATCH v7 3/6] cpufreq: amd-pstate: implement cpb_boost sysfs entry for boost control Perry Yuan
2024-04-23 11:00   ` Huang Rui
2024-04-26  6:40     ` Yuan, Perry
2024-04-25 21:17   ` Mario Limonciello
2024-04-26  6:39     ` Yuan, Perry
2024-04-23  8:40 ` [PATCH v7 4/6] cpufreq: amd-pstate: fix the MSR highest perf will be reset issue while cpb boost off Perry Yuan
2024-04-23 11:04   ` Huang Rui
2024-04-23  8:40 ` [PATCH v7 5/6] Documentation: cpufreq: amd-pstate: introduce the new cpu boost control method Perry Yuan
2024-04-23  8:40 ` [PATCH v7 6/6] cpufreq: amd-pstate-ut: support new cpb boost control interface Perry Yuan
2024-04-23 11:07   ` Huang Rui

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