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From: <Claudiu.Beznea@microchip.com>
To: <alexandre.belloni@bootlin.com>
Cc: <a.zummo@towertech.it>, <robh+dt@kernel.org>,
	<mark.rutland@arm.com>, <Nicolas.Ferre@microchip.com>,
	<Ludovic.Desroches@microchip.com>, <tglx@linutronix.de>,
	<jason@lakedaemon.net>, <maz@kernel.org>,
	<linux-rtc@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 4/5] ARM: dts: sam9x60: add rtt
Date: Tue, 14 Apr 2020 12:13:46 +0000	[thread overview]
Message-ID: <a07d841e-efa9-6c01-69e2-0ed33f9759c5@microchip.com> (raw)
In-Reply-To: <20200414111600.GE34509@piout.net>



On 14.04.2020 14:16, Alexandre Belloni wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> On 14/04/2020 08:42:08+0000, Claudiu.Beznea@microchip.com wrote:
>>> Why would one use the RTT while the RTC is far superior?
>>
>> I didn't enabled this for a particular use case, but: couldn't this be used
>> by some user that wants to generate multiple alarms? from multiple RTCs?
>>
> 
> I very much doubt that as Linux is able to properly multiplex alarms and
> basically, the only one we are interested in is actually wakeup.

I think you can use the wakealarm sysfs exported file to prepare an alarm
and take user space actions based on that without being suspended.

> 
>> Moreover, this IP's counter has the possibility of being clocked at 1Hz.
>> Couldn't this minimize the power consumption while being in a power saving
>> mode?
>>
> 
> And that 1Hz clock is coming from the RTC so using the RTC is
> definitively consuming less power.

Datasheet specifies this: "Configuring the RTPRES field value to 0x8000
(default value) corresponds to feeding the real-time counter with a

1Hz signal (if the slow clock is 32.768 kHz)."

So, it is not the RTC, it is the slow clock divided by 32768.

> 
>>>
>>>>>
>>>>> In any case, this diff should be merge with the other at91-sam9x60ek.dts
>>>>> change instead of being with the dtsi change.
>>>>
>>>> The changes in this patch are related to enabling the RTT. The other dts
>>>> change is related to enabling gpbr. The RTT uses that enabled gpbr -> one
>>>> change per patch.
>>>>
>>>> If you still want to merge then, I'll do it, but then it becomes mixed.
>>>>
>>>
>>> This patch is already mixing add the gpbr in sam9x60ek and add the node
>>> in sam9x60.dtsi which is worse.
>>
>> This patch is like this:
>>
>> diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts
>> b/arch/arm/boot/dts/at91-sam9x60ek.dts
>> index ab3d2d9a420a..4020e79a958e 100644
>> --- a/arch/arm/boot/dts/at91-sam9x60ek.dts
>> +++ b/arch/arm/boot/dts/at91-sam9x60ek.dts
>> @@ -617,6 +617,11 @@
>>       };
>>  };
>>
>> +&rtt {
>> +     atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
>> +     status = "okay";
>> +};
>> +
>>  &shutdown_controller {
>>       atmel,shdwc-debouncer = <976>;
>>       status = "okay";
>> diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi
>> index 326b39328b58..e1d8e3a4cb0b 100644
>> --- a/arch/arm/boot/dts/sam9x60.dtsi
>> +++ b/arch/arm/boot/dts/sam9x60.dtsi
>> @@ -661,6 +661,13 @@
>>                               status = "disabled";
>>                       };
>>
>> +                     rtt: rtt@fffffe20 {
>> +                             compatible = "microchip,sam9x60-rtt";
>> +                             reg = <0xfffffe20 0x20>;
>> +                             interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>> +                             clocks = <&clk32k 0>;
>> +                     };
>> +
>>
>> It doesn't adds the GPBR in sam9x60ek, it adds rtt in sam9x60ek which uses
>> GPBR.
>>
>>>
>>> Just have one patch adding the rtt node to the sam9x60.dtsi and then a
>>> patch adding the RTT to sam9x60ek.
>>
>> Ok, I understand this.
>>
>>> Because the RTT uses the gpbr, it is
>>> a good time to add enable the gpbr, this is a single functionnal change.
>>>
>>> Let's say that for some reason, the RTT patch on sam9x60ek has to be
>>> reverted, then the RTT node is still defined which is good for all the
>>> other eventual users.
>>
>> RTT node would still be defined but GPBR node will not be enabled.
>>
>> If RTT patch contains this change that I understand you want me to merge here:
>>
>> +&gpbr {
>> +     status = "okay";
>> +};
>> +
>>
>> then, theoretically, some other IPs using the GPBR (RTC have the
>> possibility of doing this), may be broken by reverting the RTT patch that
>> includes the GPBR enabling patch.
>>
> 
> But this is very unlikely to happen because this would be limited to a
> single board device tree instead of impact every sam9x60 based boards.

Very unlikely but a having a patch with diff like this:

+&gpbr {
+     status = "okay";
+};
+
+&rtt {
+     atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
+     status = "okay";
+};
+

and reverting it may affect the other users of gpbr in sam9x60ek.dts.

> 
> 
> --
> Alexandre Belloni, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com
> 

  reply	other threads:[~2020-04-14 12:13 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-10 16:26 [PATCH 0/5] add RTT support for SAM9X60 Claudiu Beznea
2020-04-10 16:26 ` [PATCH 1/5] irqchip/atmel-aic5: add support for sam9x60 rtt fixup Claudiu Beznea
2020-04-10 16:26 ` [PATCH 2/5] rtc: at91sam9: enable driver for sam9x60 Claudiu Beznea
2020-04-10 16:26 ` [PATCH 3/5] ARM: dts: sam9x60ek: enable gpbr Claudiu Beznea
2020-04-10 16:26 ` [PATCH 4/5] ARM: dts: sam9x60: add rtt Claudiu Beznea
2020-04-10 22:26   ` Alexandre Belloni
2020-04-13  8:51     ` Claudiu.Beznea
2020-04-13 10:46       ` Alexandre Belloni
2020-04-14  8:42         ` Claudiu.Beznea
2020-04-14 11:16           ` Alexandre Belloni
2020-04-14 12:13             ` Claudiu.Beznea [this message]
2020-04-14 12:47               ` Alexandre Belloni
2020-04-14 13:05                 ` Claudiu.Beznea
2020-04-14 13:12                   ` Alexandre Belloni
2020-04-14 13:59                     ` Claudiu.Beznea
2020-04-10 16:26 ` [PATCH 5/5] rtc: at91sam9: add microchip,sam9x60-rtt Claudiu Beznea
2020-04-10 17:41   ` Alexandre Belloni
2020-04-13  8:50     ` Claudiu.Beznea
2020-04-13 10:41       ` Alexandre Belloni

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