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From: Chris Packham <Chris.Packham@alliedtelesis.co.nz>
To: Arnd Bergmann <arnd@arndb.de>,
	Russell King - ARM Linux <linux@armlinux.org.uk>
Cc: Borislav Petkov <bp@alien8.de>,
	"jlu@pengutronix.de" <jlu@pengutronix.de>,
	Gregory CLEMENT <gregory.clement@bootlin.com>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	DTML <devicetree@vger.kernel.org>,
	"linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
	"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>
Subject: Re: [PATCH v6 5/9] dt-bindings: ARM: document marvell,ecc-enable binding
Date: Sun, 11 Nov 2018 19:57:51 +0000	[thread overview]
Message-ID: <a07fead828b8452bb37708180dd721d4@svr-chch-ex1.atlnz.lc> (raw)
In-Reply-To: <CAK8P3a26XmBpG3VzwUgSdd_Xo_S2ezSvA9mjKckRFr9p38j-dg@mail.gmail.com>

On 10/11/18 4:58 AM, Arnd Bergmann wrote:
> On Fri, Nov 9, 2018 at 12:48 PM Russell King - ARM Linux
> <linux@armlinux.org.uk> wrote:
>>
>> On Fri, Nov 09, 2018 at 12:40:06PM +0100, Arnd Bergmann wrote:
>>> On Fri, Nov 9, 2018 at 8:04 AM Chris Packham
>>> <chris.packham@alliedtelesis.co.nz> wrote:
>>>>
>>>> Add documentation for the marvell,ecc-enable and marvell,ecc-disable
>>>> properties which can be used to enable/disable ECC on the Marvell aurora
>>>> cache.
>>>>
>>>> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
>>>> ---
>>>
>>> Why do you need both enable and disable? Wouldn't one of them be enough here?
>>
>> It isn't an "on when ecc-enable is present, off when not" because the
>> current behaviour is to preserve these bits in the control register.
>>
>> If we were to implement it as "if no ecc-enable property, turn off
>> ECC" then that would drastically change the behaviour - systems which
>> were configured for ECC suddenly lose ECC support.
>>
>> Since we don't know which have it and which don't, we can't implement
>> the option like that.
> 
> What I meant was why we need support force-disabling it. I understand
> that we need to allow leaving it at the boot-time default as well as
> force-enabling it.

I added ecc-disable because I was modeling it after 
arm,parity-enable/arm,parity-disable. The only reason I can imagine 
wanting to force disable this would be some mis-behaving SoC which has 
it enabled by default in hardware, to my knowledge no such system exists 
(that would use this driver).

I'd be happy to drop the binding an implementation and send a v7 if you 
feel strongly that it marvell,ecc-disable should be removed.

  reply	other threads:[~2018-11-11 19:58 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-09  7:03 [PATCH v6 0/9] EDAC drivers for Armada XP L2 and DDR Chris Packham
2018-11-09  7:03 ` [PATCH v6 1/9] ARM: l2c: move cache-aurora-l2.h to asm/hardware Chris Packham
2018-11-09  7:03 ` [PATCH v6 2/9] ARM: aurora-l2: add prefix to MAX_RANGE_SIZE Chris Packham
2018-11-09  7:03 ` [PATCH v6 3/9] ARM: aurora-l2: add defines for parity and ECC registers Chris Packham
2018-11-09  7:03 ` [PATCH v6 4/9] ARM: l2x0: support parity-enable/disable on aurora Chris Packham
2018-11-09  7:03 ` [PATCH v6 5/9] dt-bindings: ARM: document marvell,ecc-enable binding Chris Packham
2018-11-09 11:40   ` Arnd Bergmann
2018-11-09 11:48     ` Russell King - ARM Linux
2018-11-09 15:58       ` Arnd Bergmann
2018-11-11 19:57         ` Chris Packham [this message]
2018-11-11 22:35   ` Rob Herring
2018-11-09  7:03 ` [PATCH v6 6/9] ARM: l2x0: add marvell,ecc-enable property for aurora Chris Packham
2018-11-09  7:03 ` [PATCH v6 7/9] EDAC: Add missing debugfs_create_x32 wrapper Chris Packham
2018-11-09  7:03 ` [PATCH v6 8/9] EDAC: Add driver for the Marvell Armada XP SDRAM and L2 cache ECC Chris Packham
2018-11-11 19:40   ` Borislav Petkov
2018-11-09  7:03 ` [PATCH v6 9/9] EDAC: armada_xp: Add support for more SoCs Chris Packham

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