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From: Vidya Sagar <vidyas@nvidia.com>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: <bhelgaas@google.com>, <lorenzo.pieralisi@arm.com>,
	<thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
	<linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<kthota@nvidia.com>, <mmaddireddy@nvidia.com>,
	<sagar.tv@gmail.com>
Subject: Re: [PATCH] PCI/MSI: Set device flag indicating only 32-bit MSI support
Date: Tue, 24 Nov 2020 09:27:06 +0530	[thread overview]
Message-ID: <a11f7fb2-6512-484f-70f8-bd9493ab7766@nvidia.com> (raw)
In-Reply-To: <20201120213036.GA278887@bjorn-Precision-5520>



On 11/21/2020 3:00 AM, Bjorn Helgaas wrote:
> External email: Use caution opening links or attachments
> 
> 
> On Tue, Nov 17, 2020 at 08:27:28PM +0530, Vidya Sagar wrote:
>> There are devices (Ex:- Marvell SATA controller) that don't support
>> 64-bit MSIs and the same is advertised through their MSI capability
>> register.
> 
> I *think* you're saying these devices behave correctly per spec: they
> don't support 64-bit MSI, and they don't advertise support for 64-bit
> MSI.  Right?
Yes. That is what I intended to say.

> 
>> Set no_64bit_msi flag explicitly for such devices in the
>> MSI setup code so that the msi_verify_entries() API would catch
>> if the MSI arch code tries to use 64-bit MSI.
> 
> And you want msi_verify_entries() to catch attempts by the arch code
> to assign a 64-bit MSI address?
Yes.

> 
> That sounds OK, but the error message ("Device has broken 64-bit MSI")
> is not appropriate if the device is actually *not* broken.
Ok. I didn't change the existing error message. I'll change it to cover 
both the scenarios i.e. either the device is broken or the device 
doesn't really support 64-bit MSI.

> 
>> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
>> ---
>>   drivers/pci/msi.c | 6 ++++--
>>   1 file changed, 4 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
>> index d52d118979a6..af49da28854e 100644
>> --- a/drivers/pci/msi.c
>> +++ b/drivers/pci/msi.c
>> @@ -581,10 +581,12 @@ msi_setup_entry(struct pci_dev *dev, int nvec, struct irq_affinity *affd)
>>        entry->msi_attrib.multi_cap     = (control & PCI_MSI_FLAGS_QMASK) >> 1;
>>        entry->msi_attrib.multiple      = ilog2(__roundup_pow_of_two(nvec));
>>
>> -     if (control & PCI_MSI_FLAGS_64BIT)
>> +     if (control & PCI_MSI_FLAGS_64BIT) {
>>                entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_64;
>> -     else
>> +     } else {
>>                entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_32;
>> +             dev->no_64bit_msi = 1;
>> +     }
>>
>>        /* Save the initial mask status */
>>        if (entry->msi_attrib.maskbit)
>> --
>> 2.17.1
>>

  reply	other threads:[~2020-11-24  3:57 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-17 14:57 Vidya Sagar
2020-11-20 21:30 ` Bjorn Helgaas
2020-11-24  3:57   ` Vidya Sagar [this message]
2020-11-24 10:50 ` [PATCH V2] " Vidya Sagar
2020-12-03  5:00   ` Vidya Sagar
2020-12-03 18:24   ` Bjorn Helgaas
2020-12-03 19:03     ` Vidya Sagar
2020-12-03 19:54       ` Bjorn Helgaas
2020-12-04  2:28         ` Vidya Sagar

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