From: Babu Moger <babu.moger@amd.com>
To: James Morse <james.morse@arm.com>,
"x86@kernel.org" <x86@kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Cc: Fenghua Yu <fenghua.yu@intel.com>,
Reinette Chatre <reinette.chatre@intel.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
H Peter Anvin <hpa@zytor.com>
Subject: RE: [PATCH v2 10/10] cacheinfo: Move resctrl's get_cache_id() to the cacheinfo header file
Date: Wed, 13 May 2020 15:04:22 -0500 [thread overview]
Message-ID: <a1255e05-6056-a731-9244-3a3ec84d1cb2@amd.com> (raw)
In-Reply-To: <20200430170400.21501-11-james.morse@arm.com>
> -----Original Message-----
> From: James Morse <james.morse@arm.com>
> Sent: Thursday, April 30, 2020 12:04 PM
> To: x86@kernel.org; linux-kernel@vger.kernel.org
> Cc: Fenghua Yu <fenghua.yu@intel.com>; Reinette Chatre
> <reinette.chatre@intel.com>; Thomas Gleixner <tglx@linutronix.de>; Ingo
> Molnar <mingo@redhat.com>; Borislav Petkov <bp@alien8.de>; H Peter Anvin
> <hpa@zytor.com>; Moger, Babu <Babu.Moger@amd.com>; James Morse
> <james.morse@arm.com>
> Subject: [PATCH v2 10/10] cacheinfo: Move resctrl's get_cache_id() to the
> cacheinfo header file
>
> resctrl/core.c defines get_cache_id() for use in its cpu-hotplug
> callbacks. This gets the id attribute of the cache at the corresponding
> level of a cpu.
>
> Later rework means this private function needs to be shared. Move
> it to the header file.
>
> The name conflicts with a different definition in intel_cacheinfo.c,
> name it get_cpu_cacheinfo_id() to show its relation with
> get_cpu_cacheinfo().
>
> Now this is visible on other architectures, check the id attribute
> has actually been set.
>
> Signed-off-by: James Morse <james.morse@arm.com>
Reviewed-by: Babu Moger <babu.moger@amd.com>
> ---
> arch/x86/kernel/cpu/resctrl/core.c | 17 ++---------------
> include/linux/cacheinfo.h | 21 +++++++++++++++++++++
> 2 files changed, 23 insertions(+), 15 deletions(-)
>
> diff --git a/arch/x86/kernel/cpu/resctrl/core.c
> b/arch/x86/kernel/cpu/resctrl/core.c
> index 00c88f42742c..f6458cefcac3 100644
> --- a/arch/x86/kernel/cpu/resctrl/core.c
> +++ b/arch/x86/kernel/cpu/resctrl/core.c
> @@ -350,19 +350,6 @@ static void rdt_get_cdp_l2_config(void)
> rdt_get_cdp_config(RDT_RESOURCE_L2, RDT_RESOURCE_L2CODE);
> }
>
> -static int get_cache_id(int cpu, int level)
> -{
> - struct cpu_cacheinfo *ci = get_cpu_cacheinfo(cpu);
> - int i;
> -
> - for (i = 0; i < ci->num_leaves; i++) {
> - if (ci->info_list[i].level == level)
> - return ci->info_list[i].id;
> - }
> -
> - return -1;
> -}
> -
> static void
> mba_wrmsr_amd(struct rdt_domain *d, struct msr_param *m, struct
> rdt_resource *r)
> {
> @@ -560,7 +547,7 @@ static int domain_setup_mon_state(struct rdt_resource
> *r, struct rdt_domain *d)
> */
> static void domain_add_cpu(int cpu, struct rdt_resource *r)
> {
> - int id = get_cache_id(cpu, r->cache_level);
> + int id = get_cpu_cacheinfo_id(cpu, r->cache_level);
> struct list_head *add_pos = NULL;
> struct rdt_domain *d;
>
> @@ -606,7 +593,7 @@ static void domain_add_cpu(int cpu, struct rdt_resource
> *r)
>
> static void domain_remove_cpu(int cpu, struct rdt_resource *r)
> {
> - int id = get_cache_id(cpu, r->cache_level);
> + int id = get_cpu_cacheinfo_id(cpu, r->cache_level);
> struct rdt_domain *d;
>
> d = rdt_find_domain(r, id, NULL);
> diff --git a/include/linux/cacheinfo.h b/include/linux/cacheinfo.h
> index 46b92cd61d0c..4f72b47973c3 100644
> --- a/include/linux/cacheinfo.h
> +++ b/include/linux/cacheinfo.h
> @@ -3,6 +3,7 @@
> #define _LINUX_CACHEINFO_H
>
> #include <linux/bitops.h>
> +#include <linux/cpu.h>
> #include <linux/cpumask.h>
> #include <linux/smp.h>
>
> @@ -119,4 +120,24 @@ int acpi_find_last_cache_level(unsigned int cpu);
>
> const struct attribute_group *cache_get_priv_group(struct cacheinfo
> *this_leaf);
>
> +/*
> + * Get the id of the cache associated with @cpu at level @level.
> + * cpuhp lock must be held.
> + */
> +static inline int get_cpu_cacheinfo_id(int cpu, int level)
> +{
> + struct cpu_cacheinfo *ci = get_cpu_cacheinfo(cpu);
> + int i;
> +
> + for (i = 0; i < ci->num_leaves; i++) {
> + if (ci->info_list[i].level == level) {
> + if (ci->info_list[i].attributes & CACHE_ID)
> + return ci->info_list[i].id;
> + return -1;
> + }
> + }
> +
> + return -1;
> +}
> +
> #endif /* _LINUX_CACHEINFO_H */
> --
> 2.26.1
next prev parent reply other threads:[~2020-05-13 20:04 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-30 17:03 [PATCH v2 00/10] x86/resctrl: Misc cleanup James Morse
2020-04-30 17:03 ` [PATCH v2 01/10] x86/resctrl: Nothing uses struct mbm_state chunks_bw James Morse
2020-04-30 17:03 ` [PATCH v2 02/10] x86/resctrl: Remove max_delay James Morse
2020-04-30 17:03 ` [PATCH v2 03/10] x86/resctrl: Fix stale comment James Morse
2020-04-30 17:03 ` [PATCH v2 04/10] x86/resctrl: use container_of() in delayed_work handlers James Morse
2020-04-30 17:03 ` [PATCH v2 05/10] x86/resctrl: Include pid.h James Morse
2020-04-30 17:03 ` [PATCH v2 06/10] x86/resctrl: Use is_closid_match() in more places James Morse
2020-05-11 20:42 ` Reinette Chatre
2020-04-30 17:03 ` [PATCH v2 07/10] x86/resctrl: Add arch_needs_linear to explain AMD/Intel MBA difference James Morse
2020-04-30 17:03 ` [PATCH v2 08/10] x86/resctrl: Merge AMD/Intel parse_bw() calls James Morse
2020-05-11 20:43 ` Reinette Chatre
2020-04-30 17:03 ` [PATCH v2 09/10] x86/resctrl: Add arch_has_sparse_bitmaps to explain AMD/Intel CAT difference James Morse
2020-05-11 18:14 ` Reinette Chatre
2020-05-13 20:03 ` Babu Moger
2020-05-15 18:21 ` James Morse
2020-05-15 19:15 ` Babu Moger
2020-04-30 17:04 ` [PATCH v2 10/10] cacheinfo: Move resctrl's get_cache_id() to the cacheinfo header file James Morse
2020-05-13 20:04 ` Babu Moger [this message]
2020-05-13 20:03 ` [PATCH v2 00/10] x86/resctrl: Misc cleanup Babu Moger
2020-05-14 15:29 ` Reinette Chatre
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