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From: Nathan Fontenot <nathan.fontenot@amd.com>
To: "Yuan, Perry" <Perry.Yuan@amd.com>,
	"rafael.j.wysocki@intel.com" <rafael.j.wysocki@intel.com>,
	"Huang, Ray" <Ray.Huang@amd.com>,
	"viresh.kumar@linaro.org" <viresh.kumar@linaro.org>
Cc: "Sharma, Deepak" <Deepak.Sharma@amd.com>,
	"Limonciello, Mario" <Mario.Limonciello@amd.com>,
	"Deucher, Alexander" <Alexander.Deucher@amd.com>,
	"Su, Jinzhou (Joe)" <Jinzhou.Su@amd.com>,
	"Huang, Shimmer" <Shimmer.Huang@amd.com>,
	"Du, Xiaojian" <Xiaojian.Du@amd.com>,
	"Meng, Li (Jassmine)" <Li.Meng@amd.com>,
	"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 4/7] cpufreq: amd_pstate: add AMD pstate EPP support for shared memory type processor
Date: Thu, 29 Sep 2022 09:08:10 -0500	[thread overview]
Message-ID: <a2ac526b-477d-277c-07ce-2b05c35b643d@amd.com> (raw)
In-Reply-To: <DM4PR12MB5278639EB4E0FD416653743A9C539@DM4PR12MB5278.namprd12.prod.outlook.com>

On 9/25/22 07:23, Yuan, Perry wrote:
> [AMD Official Use Only - General]
> 
> Hi Nathan.
> 
> 
>> -----Original Message-----
>> From: Fontenot, Nathan <Nathan.Fontenot@amd.com>
>> Sent: Friday, September 16, 2022 12:24 AM
>> To: Yuan, Perry <Perry.Yuan@amd.com>; rafael.j.wysocki@intel.com; Huang,
>> Ray <Ray.Huang@amd.com>; viresh.kumar@linaro.org
>> Cc: Sharma, Deepak <Deepak.Sharma@amd.com>; Limonciello, Mario
>> <Mario.Limonciello@amd.com>; Deucher, Alexander
>> <Alexander.Deucher@amd.com>; Su, Jinzhou (Joe) <Jinzhou.Su@amd.com>;
>> Huang, Shimmer <Shimmer.Huang@amd.com>; Du, Xiaojian
>> <Xiaojian.Du@amd.com>; Meng, Li (Jassmine) <Li.Meng@amd.com>; linux-
>> pm@vger.kernel.org; linux-kernel@vger.kernel.org
>> Subject: Re: [PATCH 4/7] cpufreq: amd_pstate: add AMD pstate EPP support
>> for shared memory type processor
>>
>> On 9/9/22 11:45, Perry Yuan wrote:
>>> Add Energy Performance Preference support for AMD SOCs which only
>>> support the shared memory interface that implemented on Zen2 and Zen3
>>> processors, because this type CPU has no MSR supported, it will use
>>> ACPI PCC channel to enable EPP and reset desired perf to be zero.
>>>
>>> Signed-off-by: Perry Yuan <Perry.Yuan@amd.com>
>>> ---
>>>  drivers/cpufreq/amd-pstate.c | 12 ++++++++++++
>>>  1 file changed, 12 insertions(+)
>>>
>>> diff --git a/drivers/cpufreq/amd-pstate.c
>>> b/drivers/cpufreq/amd-pstate.c index 451295284a26..fff298744a8e 100644
>>> --- a/drivers/cpufreq/amd-pstate.c
>>> +++ b/drivers/cpufreq/amd-pstate.c
>>> @@ -133,12 +133,24 @@ static inline int pstate_enable(bool enable)
>>>
>>>  static int cppc_enable(bool enable)
>>>  {
>>> +	struct cppc_perf_ctrls perf_ctrls;
>>>  	int cpu, ret = 0;
>>>
>>>  	for_each_present_cpu(cpu) {
>>>  		ret = cppc_set_enable(cpu, enable);
>>>  		if (ret)
>>>  			return ret;
>>> +
>>> +	/* Enable active mode for EPP */
>>> +	ret = cppc_set_auto_epp(cpu, enable);
>>> +	if (ret)
>>> +		return ret;
>>> +
>>> +	/* Set zero to desired perf to enable EPP control*/
>>> +	perf_ctrls.desired_perf = 0;
>>> +	ret = cppc_set_perf(cpu, &perf_ctrls);
>>> +	if (ret)
>>> +		return ret;
>>
>> Shouldn't this entire block be indented one additional tab over since its part
>> of the for_each_present_cpu() loop?
>>
>> -Nathan
> 
> Yes, I can see the indent in my local vscode editor, I do not know why the patch didn`t show that.
> Is it correct as below ?
> 
> 	for_each_present_cpu(cpu) {
> 		ret = cppc_set_enable(cpu, enable);
> 		if (ret)
> 			return ret;
> 
> 		if (epp_enabled) {
> 			/* Enable autonomous mode for EPP */
> 			ret = cppc_set_auto_epp(cpu, enable);
> 			if (ret)
> 				return ret;
> 
> 			/* Set zero to desired perf to allow EPP firmware control*/
> 			perf_ctrls.desired_perf = 0;
> 			ret = cppc_set_perf(cpu, &perf_ctrls);
> 			if (ret)
> 				return ret;
> 		}
> 	}
> 
> Perry. 

That looks much better.

-Nathan

> 
>>
>>>  	}
>>>
>>>  	return ret;

  reply	other threads:[~2022-09-29 14:08 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-09 16:45 [PATCH 0/7] Implement AMD Pstate EPP Driver Perry Yuan
2022-09-09 16:45 ` [PATCH 1/7] ACPI: CPPC: Add AMD pstate energy performance preference cppc control Perry Yuan
2022-09-09 16:45 ` [PATCH 2/7] cpufreq: amd_pstate: add module parameter to load amd pstate EPP driver Perry Yuan
2022-09-09 18:49   ` Limonciello, Mario
2022-09-13 15:14     ` Yuan, Perry
2022-09-25 16:58     ` Yuan, Perry
2022-09-09 16:45 ` [PATCH 3/7] Documentation: amd-pstate: add EPP profiles introduction Perry Yuan
2022-09-09 16:45 ` [PATCH 4/7] cpufreq: amd_pstate: add AMD pstate EPP support for shared memory type processor Perry Yuan
2022-09-09 18:52   ` Limonciello, Mario
2022-09-13 15:20     ` Yuan, Perry
2022-09-25 17:01     ` Yuan, Perry
2022-09-15 16:24   ` Nathan Fontenot
2022-09-25 12:23     ` Yuan, Perry
2022-09-29 14:08       ` Nathan Fontenot [this message]
2022-09-09 16:45 ` [PATCH 5/7] cpufreq: amd_pstate: add AMD Pstate EPP support for the MSR based processors Perry Yuan
2022-09-15 18:58   ` Nathan Fontenot
2022-09-25 17:12     ` Yuan, Perry
2022-09-09 16:45 ` [PATCH 6/7] cpufreq: amd_pstate: implement amd pstate cpu online and offline callback Perry Yuan
2022-09-09 19:02   ` Limonciello, Mario
2022-09-15 19:03   ` Nathan Fontenot
2022-09-09 16:45 ` [PATCH 7/7] cpufreq: amd-pstate: implement suspend and resume callbacks Perry Yuan
2022-09-09 19:00   ` Limonciello, Mario

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