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[109.252.193.91]) by smtp.googlemail.com with ESMTPSA id q2sm61976lfd.84.2021.05.17.07.47.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 17 May 2021 07:47:09 -0700 (PDT) Subject: Re: [PATCH v1 1/1] soc/tegra: Add devm_tegra_core_dev_init_opp_table() To: Krzysztof Kozlowski , Thierry Reding , Jonathan Hunter , Paul Fertser , Matt Merhar , Peter Geis , Nicolas Chauvet , Viresh Kumar , Stephen Boyd Cc: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org References: <20210516205138.22501-1-digetx@gmail.com> <20210516205138.22501-2-digetx@gmail.com> <3ea6b48f-af3f-51db-8d7b-1292a68ae74e@canonical.com> From: Dmitry Osipenko Message-ID: Date: Mon, 17 May 2021 17:47:09 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: <3ea6b48f-af3f-51db-8d7b-1292a68ae74e@canonical.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 17.05.2021 14:43, Krzysztof Kozlowski пишет: ... >> +static int tegra_core_dev_init_opp_state(struct device *dev) >> +{ >> + struct dev_pm_opp *opp; >> + unsigned long rate; >> + struct clk *clk; >> + int err; >> + >> + clk = devm_clk_get(dev, NULL); >> + if (IS_ERR(clk)) { >> + dev_err(dev, "failed to get clk: %pe\n", clk); >> + return PTR_ERR(clk); >> + } >> + >> + rate = clk_get_rate(clk); >> + if (!rate) { >> + dev_err(dev, "failed to get clk rate\n"); >> + return -EINVAL; >> + } >> + >> + opp = dev_pm_opp_find_freq_ceil(dev, &rate); >> + >> + if (opp == ERR_PTR(-ERANGE)) >> + opp = dev_pm_opp_find_freq_floor(dev, &rate); >> + >> + err = PTR_ERR_OR_ZERO(opp); >> + if (err) { >> + dev_err(dev, "failed to get OPP for %ld Hz: %d\n", >> + rate, err); >> + return err; >> + } >> + >> + dev_pm_opp_put(opp); >> + >> + /* first dummy rate-setting initializes voltage vote */ >> + err = dev_pm_opp_set_rate(dev, rate); >> + if (err) { >> + dev_err(dev, "failed to initialize OPP clock: %d\n", err); >> + return err; >> + } > > > The devm_pm_opp_set_clkname will call clk_get(), so here you should drop > the clk reference at the end. Why having it twice? The devm_pm_opp_set_clkname assigns clock to the OPP table. The devm_clk_get() is needed for the clk_get_rate(). OPP core doesn't initialize voltage vote and we need this initialization for the Tegra memory drivers. The reference count of the clk will be dropped automatically once device driver is released. The resource-managed helper avoids the need to care about the error unwinding in the code, making it clean and easy to follow. ... >> +EXPORT_SYMBOL_GPL(devm_tegra_core_dev_init_opp_table); >> diff --git a/include/soc/tegra/common.h b/include/soc/tegra/common.h >> index 98027a76ce3d..e8eab13aa199 100644 >> --- a/include/soc/tegra/common.h >> +++ b/include/soc/tegra/common.h >> @@ -6,6 +6,36 @@ >> #ifndef __SOC_TEGRA_COMMON_H__ >> #define __SOC_TEGRA_COMMON_H__ >> >> +#include >> +#include >> + >> +struct device; >> + >> +/** >> + * Tegra SoC core device OPP table configuration >> + * >> + * @init_state: pre-initialize OPP state of a device >> + */ >> +struct tegra_core_opp_params { >> + bool init_state; >> +}; >> + >> +#ifdef CONFIG_ARCH_TEGRA >> bool soc_is_tegra(void); >> +int devm_tegra_core_dev_init_opp_table(struct device *dev, >> + struct tegra_core_opp_params *params); >> +#else >> +static inline bool soc_is_tegra(void) > > This looks unrelated. Please make it a separate patch. The missing stub for soc_is_tegra() popped up multiple times before. Hence it didn't look like a bad idea to me to add stub for it since this patch touches code around it. I'll factor it out into a separate patch in v2.