From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757702AbcLQOky (ORCPT ); Sat, 17 Dec 2016 09:40:54 -0500 Received: from mailout2.hostsharing.net ([83.223.90.233]:43991 "EHLO mailout2.hostsharing.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757298AbcLQOkw (ORCPT ); Sat, 17 Dec 2016 09:40:52 -0500 X-Mailbox-Line: From a3d5ab2363b2155feeb27cd97d503e375570f2d6 Mon Sep 17 00:00:00 2001 Message-Id: In-Reply-To: References: From: Lukas Wunner Date: Sat, 17 Dec 2016 15:39:39 +0100 Subject: [PATCH v3 3/7] PCI: Don't block runtime PM for Thunderbolt host hotplug ports To: Greg Kroah-Hartman , linux-kernel@vger.kernel.org Cc: Andreas Noever , linux-pci@vger.kernel.org, linux-pm@vger.kernel.org, Tomas Winkler , Amir Levy , Bjorn Helgaas , Mika Westerberg , "Rafael J. Wysocki" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hotplug ports generally block their parents from suspending to D3hot as otherwise their interrupts couldn't be delivered. An exception are Thunderbolt host controllers: They have a separate GPIO pin to side-band signal plug events even if the controller is powered down or its parent ports are suspended to D3. They can be told apart from Thunderbolt controllers in attached devices by checking if they're situated below a non-Thunderbolt device (typically a root port, or the downstream port of a PCIe switch in the case of the MacPro6,1). To enable runtime PM for Thunderbolt on the Mac, the downstream bridges of a host controller must not block runtime PM on the upstream bridge as power to the chip is only cut once the upstream bridge has suspended. Amend the condition in pci_dev_check_d3cold() accordingly. Cc: Mika Westerberg Cc: Rafael J. Wysocki Cc: Andreas Noever Cc: Tomas Winkler Cc: Amir Levy Signed-off-by: Lukas Wunner --- drivers/pci/pci.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 8ed098d..0b03fe7 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -2271,6 +2271,7 @@ bool pci_bridge_d3_possible(struct pci_dev *bridge) static int pci_dev_check_d3cold(struct pci_dev *dev, void *data) { + struct pci_dev *parent, *grandparent; bool *d3cold_ok = data; if (/* The device needs to be allowed to go D3cold ... */ @@ -2284,7 +2285,17 @@ static int pci_dev_check_d3cold(struct pci_dev *dev, void *data) !pci_power_manageable(dev) || /* Hotplug interrupts cannot be delivered if the link is down. */ - dev->is_hotplug_bridge) + (dev->is_hotplug_bridge && + + /* + * Exception: Thunderbolt host controllers have a pin to + * side-band signal plug events. Their hotplug ports are + * recognizable by having a non-Thunderbolt device as + * grandparent. + */ + !(dev->is_thunderbolt && (parent = pci_upstream_bridge(dev)) && + (grandparent = pci_upstream_bridge(parent)) && + !grandparent->is_thunderbolt))) *d3cold_ok = false; -- 2.10.2