From: Andre Przywara <andre.przywara@arm.com>
To: icenowy@aosc.io, Rob Herring <robh+dt@kernel.org>,
Maxime Ripard <maxime.ripard@bootlin.com>,
Chen-Yu Tsai <wens@csie.org>,
Linus Walleij <linus.walleij@linaro.org>
Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,
linux-sunxi@googlegroups.com
Subject: Re: [linux-sunxi] [PATCH v4 4/9] pinctrl: sunxi: add support for the Allwinner H6 main pin controller
Date: Fri, 16 Mar 2018 17:07:28 +0000 [thread overview]
Message-ID: <a74d898f-7047-eebf-027e-106c40be2b9d@arm.com> (raw)
In-Reply-To: <20180316140215.28663-5-icenowy@aosc.io>
Hi,
On 16/03/18 14:02, Icenowy Zheng wrote:
> The Allwinner H6 SoC has two pin controllers, one main controller
> (called CPUX-PORT in user manual) and one controller in CPUs power
> domain (called CPUS-PORT in user manual).
>
> This commit introduces support for the main pin controller on H6.
>
> The pin bank A and B are not wired out and hidden from the SoC's
> documents, however it's shown that the "ATE" (an AC200 chip
> co-packaged with the H6 die) is connected to the main SoC die via these
> pin banks. The information about these banks is just copied from the BSP
> pinctrl driver, but re-formatted to fit the mainline pinctrl driver
> format. The GPIO functions are dropped, as they're impossible to use --
> except a GPIO&IRQ only pin (PB20) which might be the IRQ of ATE.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> Acked-by: Rob Herring <robh@kernel.org>
As mentioned before, I checked every single pin against the manual and
this looks correct to me.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Thanks!
Andre.
next prev parent reply other threads:[~2018-03-16 17:07 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-16 14:02 [PATCH v4 0/9] Initial Allwinner H6 support Icenowy Zheng
2018-03-16 14:02 ` [PATCH v4 1/9] pinctrl: sunxi: refactor irq related register function to have desc Icenowy Zheng
2018-03-18 20:14 ` Maxime Ripard
2018-03-27 13:05 ` Linus Walleij
2018-03-16 14:02 ` [PATCH v4 2/9] pinctrl: sunxi: introduce IRQ bank conversion function Icenowy Zheng
2018-03-18 20:15 ` Maxime Ripard
2018-03-27 13:07 ` Linus Walleij
2018-03-16 14:02 ` [PATCH v4 3/9] pinctrl: sunxi: change irq_bank_base to irq_bank_map Icenowy Zheng
2018-03-18 20:15 ` Maxime Ripard
2018-03-27 13:08 ` Linus Walleij
2018-03-16 14:02 ` [PATCH v4 4/9] pinctrl: sunxi: add support for the Allwinner H6 main pin controller Icenowy Zheng
2018-03-16 17:07 ` Andre Przywara [this message]
2018-03-18 20:16 ` Maxime Ripard
2018-03-27 13:11 ` Linus Walleij
2018-03-16 14:02 ` [PATCH v4 5/9] clk: sunxi-ng: Support fixed post-dividers on NKMP style clocks Icenowy Zheng
2018-03-16 14:02 ` [PATCH v4 6/9] dt-bindings: add device tree binding for Allwinner H6 main CCU Icenowy Zheng
2018-03-18 12:52 ` Rob Herring
2018-03-16 14:02 ` [PATCH v4 7/9] clk: sunxi-ng: add support for the Allwinner H6 CCU Icenowy Zheng
2018-03-17 0:57 ` [linux-sunxi] " Jernej Škrabec
2018-03-16 14:02 ` [PATCH v4 8/9] arm64: allwinner: h6: add the basical Allwinner H6 DTSI file Icenowy Zheng
2018-03-16 14:02 ` [PATCH v4 9/9] arm64: allwinner: h6: add support for Pine H64 board Icenowy Zheng
2018-03-18 20:17 ` [PATCH v4 0/9] Initial Allwinner H6 support Maxime Ripard
2018-03-19 1:28 ` Icenowy Zheng
2018-03-19 13:44 ` Maxime Ripard
2018-03-27 13:12 ` Linus Walleij
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