From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756681AbcAHXRI (ORCPT ); Fri, 8 Jan 2016 18:17:08 -0500 Received: from mail.kernel.org ([198.145.29.136]:49771 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756127AbcAHXPs (ORCPT ); Fri, 8 Jan 2016 18:15:48 -0500 From: Andy Lutomirski To: x86@kernel.org, linux-kernel@vger.kernel.org Cc: Borislav Petkov , Brian Gerst , Dave Hansen , Linus Torvalds , Oleg Nesterov , "linux-mm@kvack.org" , Andy Lutomirski Subject: [RFC 09/13] x86/mm: Disable interrupts when flushing the TLB using CR3 Date: Fri, 8 Jan 2016 15:15:27 -0800 Message-Id: X-Mailer: git-send-email 2.5.0 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: Andy Lutomirski --- arch/x86/include/asm/tlbflush.h | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h index 3d905f12cda9..32e3d8769a22 100644 --- a/arch/x86/include/asm/tlbflush.h +++ b/arch/x86/include/asm/tlbflush.h @@ -135,7 +135,17 @@ static inline void cr4_set_bits_and_update_boot(unsigned long mask) static inline void __native_flush_tlb(void) { + unsigned long flags; + + /* + * We mustn't be preempted or handle an IPI while reading and + * writing CR3. Preemption could switch mms and switch back, and + * an IPI could call leave_mm. Either of those could cause our + * PCID to change asynchronously. + */ + raw_local_irq_save(flags); native_write_cr3(native_read_cr3()); + raw_local_irq_restore(flags); } static inline void __native_flush_tlb_global_irq_disabled(void) -- 2.5.0