From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: Leo Yan <leo.yan@linaro.org>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>,
Mathieu Poirier <mathieu.poirier@linaro.org>,
Mike Leach <mike.leach@linaro.org>,
Jonathan Corbet <corbet@lwn.net>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
John Garry <john.garry@huawei.com>, Will Deacon <will@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Mark Rutland <mark.rutland@arm.com>, Jiri Olsa <jolsa@redhat.com>,
Namhyung Kim <namhyung@kernel.org>,
Daniel Kiss <Daniel.Kiss@arm.com>,
Denis Nikitin <denik@chromium.org>,
coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
Al Grant <al.grant@arm.com>
Subject: Re: [PATCH v2 6/7] perf cs-etm: Detect pid in VMID for kernel running at EL2
Date: Thu, 4 Feb 2021 10:57:06 +0000 [thread overview]
Message-ID: <a8116024-76df-4c42-15ef-de3f02436b8c@arm.com> (raw)
In-Reply-To: <20210204040021.GF11059@leoy-ThinkPad-X240s>
On 2/4/21 4:00 AM, Leo Yan wrote:
> On Tue, Feb 02, 2021 at 11:29:47PM +0000, Suzuki Kuruppassery Poulose wrote:
>> On 2/2/21 4:38 PM, Leo Yan wrote:
>>> From: Suzuki K Poulose <suzuki.poulose@arm.com>
>>>
>>> The PID of the task could be traced as VMID when the kernel is running
>>> at EL2. Teach the decoder to look for VMID when the CONTEXTIDR (Arm32)
>>> or CONTEXTIDR_EL1 (Arm64) is invalid but we have a valid VMID.
>>>
>>> Cc: Mike Leach <mike.leach@linaro.org>
>>> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
>>> Cc: Al Grant <al.grant@arm.com>
>>> Co-developed-by: Leo Yan <leo.yan@linaro.org>
>>> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
>>> Signed-off-by: Leo Yan <leo.yan@linaro.org>
>>> ---
>>> .../perf/util/cs-etm-decoder/cs-etm-decoder.c | 32 ++++++++++++++++---
>>> 1 file changed, 28 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c
>>> index 3f4bc4050477..fb2a163ff74e 100644
>>> --- a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c
>>> +++ b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c
>>> @@ -6,6 +6,7 @@
>>> * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
>>> */
>>> +#include <linux/coresight-pmu.h>
>>> #include <linux/err.h>
>>> #include <linux/list.h>
>>> #include <linux/zalloc.h>
>>> @@ -491,13 +492,36 @@ cs_etm_decoder__set_tid(struct cs_etm_queue *etmq,
>>> const ocsd_generic_trace_elem *elem,
>>> const uint8_t trace_chan_id)
>>> {
>>> - pid_t tid;
>>> + pid_t tid = -1;
>>> + u64 pid_fmt;
>>> + int ret;
>>> - /* Ignore PE_CONTEXT packets that don't have a valid contextID */
>>> - if (!elem->context.ctxt_id_valid)
>>> + ret = cs_etm__get_pid_fmt(trace_chan_id, &pid_fmt);
>>> + if (ret)
>>
>> Is this something we can cache in this function ? e.g,
>> static u64 pid_fmt;
>>
>> if (!pid_pfmt)
>> ret = cs_etm__get_pid_fmt(trace_chan_id, &pid_fmt);
>>
>> As all the ETMs will be running at the same exception level.
>
> Sorry that I let you repeated your comments again.
>
> To be honest, I considered this after read your comment in the previous
> series, but I thought it's possible that multiple CPUs have different
> PID format, especially for big.LITTLE arch. After read your suggestion
> again, I think my concern is not valid, even for big.LITTLE, all CPUs
> should run on the same kernel exception level.
>
> So will follow up your suggestion to cache "pid_fmt".
No problem.
>
>>
>>> + return OCSD_RESP_FATAL_SYS_ERR;
>>> +
>>> + /*
>>> + * Process the PE_CONTEXT packets if we have a valid contextID or VMID.
>>> + * If the kernel is running at EL2, the PID is traced in CONTEXTIDR_EL2
>>> + * as VMID, Bit ETM_OPT_CTXTID2 is set in this case.
>>> + */
>>> + switch (pid_fmt) {
>>> + case BIT(ETM_OPT_CTXTID):
>>> + if (elem->context.ctxt_id_valid)
>>> + tid = elem->context.context_id;
>>> + break;
>>> + case BIT(ETM_OPT_CTXTID2) | BIT(ETM_OPT_CTXTID):
>>
>> I would rather fix the cs_etm__get_pid_fmt() to return either of these
>> as commented. i.e, ETM_OPT_CTXTID or ETM_OPT_CTXTID2. Thus we don't
>> need the this case.
>
> I explained why I set both bits for ETM_OPT_CTXTID and ETM_OPT_CTXTID2
> in the patch 05/07. Could you take a look for it?
I have responded to the comment in the patch.
>
>> With the above two addressed:
>>
>> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
>
Thanks
Suzuki
next prev parent reply other threads:[~2021-02-04 10:58 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-02 16:38 [PATCH v2 0/7] coresight: etm-perf: Fix pid tracing with VHE Leo Yan
2021-02-02 16:38 ` [PATCH v2 1/7] coresight: etm-perf: Clarify comment on perf options Leo Yan
2021-02-02 23:00 ` Suzuki K Poulose
2021-02-04 3:36 ` Leo Yan
2021-02-02 16:38 ` [PATCH v2 2/7] coresight: etm-perf: Support PID tracing for kernel at EL2 Leo Yan
2021-02-02 23:06 ` Suzuki K Poulose
2021-02-05 13:47 ` Mike Leach
2021-02-02 16:38 ` [PATCH v2 3/7] perf cs-etm: Fix bitmap for option Leo Yan
2021-02-05 11:47 ` Mike Leach
2021-02-02 16:38 ` [PATCH v2 4/7] perf cs-etm: Support PID tracing in config Leo Yan
2021-02-05 13:48 ` Mike Leach
2021-02-02 16:38 ` [PATCH v2 5/7] perf cs-etm: Add helper cs_etm__get_pid_fmt() Leo Yan
2021-02-02 23:19 ` Suzuki K Poulose
2021-02-04 3:47 ` Leo Yan
2021-02-04 10:54 ` Suzuki K Poulose
2021-02-04 11:23 ` Leo Yan
2021-02-02 16:38 ` [PATCH v2 6/7] perf cs-etm: Detect pid in VMID for kernel running at EL2 Leo Yan
2021-02-02 23:29 ` Suzuki K Poulose
2021-02-04 4:00 ` Leo Yan
2021-02-04 10:57 ` Suzuki K Poulose [this message]
2021-02-02 16:38 ` [PATCH v2 7/7] Documentation: coresight: Add PID tracing description Leo Yan
2021-02-02 23:24 ` Suzuki K Poulose
2021-02-04 4:02 ` Leo Yan
2021-02-03 17:39 ` Mike Leach
2021-02-04 4:09 ` Leo Yan
2021-02-04 11:08 ` Suzuki K Poulose
2021-02-04 12:14 ` Mike Leach
2021-02-05 5:42 ` Leo Yan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=a8116024-76df-4c42-15ef-de3f02436b8c@arm.com \
--to=suzuki.poulose@arm.com \
--cc=Daniel.Kiss@arm.com \
--cc=acme@kernel.org \
--cc=al.grant@arm.com \
--cc=alexander.shishkin@linux.intel.com \
--cc=corbet@lwn.net \
--cc=coresight@lists.linaro.org \
--cc=denik@chromium.org \
--cc=john.garry@huawei.com \
--cc=jolsa@redhat.com \
--cc=leo.yan@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-doc@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=mathieu.poirier@linaro.org \
--cc=mike.leach@linaro.org \
--cc=mingo@redhat.com \
--cc=namhyung@kernel.org \
--cc=peterz@infradead.org \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).