From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>,
krzysztof.kozlowski+dt@linaro.org, nicolas.ferre@microchip.com,
alexandre.belloni@bootlin.com, claudiu.beznea@microchip.com,
peda@axentia.se
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, lee.jones@linaro.org,
linux@armlinux.org.uk, Manohar.Puri@microchip.com,
UNGLinuxDriver@microchip.com
Subject: Re: [PATCH 3/4] dt-bindings: mux: Add lan966 flexcom mux controller
Date: Tue, 3 May 2022 14:42:06 +0200 [thread overview]
Message-ID: <a872dbc4-3c6e-c0d5-3465-0c8e9122610a@linaro.org> (raw)
In-Reply-To: <20220503105528.12824-4-kavyasree.kotagiri@microchip.com>
On 03/05/2022 12:55, Kavyasree Kotagiri wrote:
> This adds DT bindings documentation for lan966 flexcom
> mux controller.
>
> Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
> ---
> .../mux/microchip,lan966-flx-mux.yaml | 55 +++++++++++++++++++
> 1 file changed, 55 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mux/microchip,lan966-flx-mux.yaml
>
> diff --git a/Documentation/devicetree/bindings/mux/microchip,lan966-flx-mux.yaml b/Documentation/devicetree/bindings/mux/microchip,lan966-flx-mux.yaml
> new file mode 100644
> index 000000000000..8b20f531781a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mux/microchip,lan966-flx-mux.yaml
> @@ -0,0 +1,55 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mux/microchip,lan966-flx-mux.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: microchip Lan966 Flexcom multiplexer bindings
> +
> +maintainers:
> + - Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
> +
> +description: |+
> + The Microchip Lan966 have 5 Flexcoms. Each flexcom has 2 chip-selects
> + when operating in USART and SPI modes.
> + Each chip select of each flexcom can be mapped to 21 flexcom shared pins.
> + Define register offset and pin number to map a flexcom chip-select
> + to flexcom shared pin.
> +
> +properties:
Usually you need allOf referencing mux-controller.
> + compatible:
> + enum:
> + - microchip,lan966-flx-mux
> +
> + reg:
> + maxItems: 1
> +
> + '#mux-control-cells':
> + const: 1
> +
> + mux-offset-pin:
> + description: an array of register offset and flexcom shared pin(0-20).
> +
> +required:
> + - compatible
> + - '#mux-control-cells'
> + - mux-offset-pin
and reg?
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + mux: mux-controller@e2004168 {
> + compatible = "microchip,lan966-flx-mux";
> + reg = <0xe2004168 0x8>;
> + #mux-control-cells = <1>;
> + mux-offset-pin =
> + <0x18 9>; /* 0: flx3 cs0 offset, pin-9 */
You could put it in one line, I think.
> + };
> +
> + flx3 {
> + atmel,flexcom-mode = <2>;
> + mux-controls = <&mux 0>;
> + mux-control-names = "cs0";
> + };
No need for example for typical consumers. They are obvious and already
documented.
> +...
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-05-03 12:42 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-03 10:55 [PATCH 0/4] Add support for lan966 flexcom multiplexer Kavyasree Kotagiri
2022-05-03 10:55 ` [PATCH 1/4] dt-bindings: mfd: atmel,flexcom: Convert to json-schema Kavyasree Kotagiri
2022-05-03 12:34 ` Krzysztof Kozlowski
2022-05-03 22:21 ` Rob Herring
2022-05-03 10:55 ` [PATCH 2/4] dt-bindings: mfd: atmel,flexcom: Add lan966 compatible string and mux properties Kavyasree Kotagiri
2022-05-03 12:37 ` Krzysztof Kozlowski
2022-05-03 10:55 ` [PATCH 3/4] dt-bindings: mux: Add lan966 flexcom mux controller Kavyasree Kotagiri
2022-05-03 12:42 ` Krzysztof Kozlowski [this message]
2022-05-03 10:55 ` [PATCH 4/4] mux: lan966: Add support for " Kavyasree Kotagiri
2022-05-03 12:45 ` Krzysztof Kozlowski
2022-05-09 8:25 ` Kavyasree.Kotagiri
2022-05-03 19:57 ` kernel test robot
2022-05-05 20:26 ` kernel test robot
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