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([2a02:768:2307:40d6::e05]) by smtp.gmail.com with ESMTPSA id q10sm11247181eds.67.2021.03.22.05.33.28 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 22 Mar 2021 05:33:29 -0700 (PDT) Subject: Re: [PATCH 03/13] PCI: xilinx: Convert to MSI domains To: Lorenzo Pieralisi , Marc Zyngier Cc: Bjorn Helgaas , Frank Wunderlich , Thierry Reding , Thomas Gleixner , Rob Herring , Will Deacon , "K. Y. Srinivasan" , Haiyang Zhang , Stephen Hemminger , Wei Liu , Thierry Reding , Jonathan Hunter , Ryder Lee , Marek Vasut , Yoshihiro Shimoda , Michal Simek , Paul Walmsley , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-hyperv@vger.kernel.org, linux-tegra@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-renesas-soc@vger.kernel.org References: <20210225151023.3642391-1-maz@kernel.org> <20210225151023.3642391-4-maz@kernel.org> <20210322122315.GB11469@e121166-lin.cambridge.arm.com> From: Michal Simek Message-ID: Date: Mon, 22 Mar 2021 13:33:27 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: <20210322122315.GB11469@e121166-lin.cambridge.arm.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 3/22/21 1:23 PM, Lorenzo Pieralisi wrote: > On Thu, Feb 25, 2021 at 03:10:13PM +0000, Marc Zyngier wrote: >> In anticipation of the removal of the msi_controller structure, convert >> the ancient xilinx host controller driver to MSI domains. >> >> We end-up with the usual two domain structure, the top one being a >> generic PCI/MSI domain, the bottom one being xilinx-specific and handling >> the actual HW interrupt allocation. >> >> This allows us to fix some of the most appaling MSI programming, where >> the message programmed in the device is the virtual IRQ number instead >> of the allocated vector number. The allocator is also made safe with >> a mutex. This should allow support for MultiMSI, but I decided not to >> even try, since I cannot test it. >> >> Also take the opportunity to get rid of the cargo-culted memory allocation >> for the MSI capture address. *ANY* sufficiently aligned address should >> be good enough, so use the physical address of the xilinx_pcie_host >> structure instead. > > I'd agree with Bjorn that the MSI doorbell change is better split into > a separate patch, I can do it myself at merge if you agree. Thank you for doing it. Thanks, Michal