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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Jun 2021 19:06:14.8599 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 69b6990a-2749-4593-7863-08d92ab07d0d X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.34];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT011.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB3757 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 6/7/2021 4:58 PM, Punit Agrawal wrote: > External email: Use caution opening links or attachments > > > Commit fede8526cc48 ("PCI: of: Warn if non-prefetchable memory > aperture size is > 32-bit") introduced a warning for non-prefetchable > resources that need more than 32bits to resolve. It turns out that the > check is too restrictive and should be applicable to only resources > that are limited to host bridge windows that don't have the ability to > map 64-bit address space. I think the host bridge windows having the ability to map 64-bit address space is different from restricting the non-prefetchable memory aperture size to 32-bit. Whether the host bridge uses internal translations or not to map the non-prefetchable resources to 64-bit space, the size needs to be programmed in the host bridge's 'Memory Limit Register (Offset 22h)' which can represent sizes only fit into 32-bits. Host bridges having the ability to map 64-bit address spaces gives flexibility to utilize the vast 64-bit space for the (restrictive) non-prefetchable memory (i.e. mapping non-prefetchable BARs of endpoints to the 64-bit space in CPU's view) and get it translated internally and put a 32-bit address on the PCIe bus finally. - Vidya Sagar > > Relax the condition to only warn when the resource size requires > > 32-bits and doesn't allow mapping to 64-bit addresses. > > Link: https://lore.kernel.org/r/7a1e2ebc-f7d8-8431-d844-41a9c36a8911@arm.com > Signed-off-by: Punit Agrawal > Tested-by: Alexandru Elisei > Cc: Vidya Sagar > --- > drivers/pci/of.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/pci/of.c b/drivers/pci/of.c > index 1e45186a5715..38fe2589beb0 100644 > --- a/drivers/pci/of.c > +++ b/drivers/pci/of.c > @@ -581,7 +581,8 @@ static int pci_parse_request_of_pci_ranges(struct device *dev, > res_valid |= !(res->flags & IORESOURCE_PREFETCH); > > if (!(res->flags & IORESOURCE_PREFETCH)) > - if (upper_32_bits(resource_size(res))) > + if (!(res->flags & IORESOURCE_MEM_64) && > + upper_32_bits(resource_size(res))) > dev_warn(dev, "Memory resource size exceeds max for 32 bits\n"); > > break; > -- > 2.30.2 >