From: Dilip Kota <eswara.kota@linux.intel.com>
To: Philipp Zabel <p.zabel@pengutronix.de>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: robh@kernel.org, martin.blumenstingl@googlemail.com,
cheol.yong.kim@intel.com, chuanhua.lei@linux.intel.com,
qi-ming.wu@intel.com
Subject: Re: [PATCH v5 2/2] reset: intel: Add system reset controller driver
Date: Fri, 3 Jan 2020 11:54:51 +0800 [thread overview]
Message-ID: <ad18d120-e943-57ff-de58-4812fc415cd0@linux.intel.com> (raw)
In-Reply-To: <fe55d2c00eda2d1b94e69fe2df05114ba88b5128.camel@pengutronix.de>
On 1/2/2020 7:43 PM, Philipp Zabel wrote:
> On Mon, 2019-12-16 at 14:55 +0800, Dilip Kota wrote:
>> Add driver for the reset controller present on Intel
>> Gateway SoCs for performing reset management of the
>> devices present on the SoC. Driver also registers a
>> reset handler to peform the entire device reset.
>>
>> Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com>
>> ---
>> Changes on v5:
>> Rebase patches on v5.5-rc1 kernel
>>
>> Changes on v4:
>> No Change
>>
>> Changes on v3:
>> Address review comments:
>> Remove intel_reset_device() as not supported
>> reset-intel-syscon.c renamed to reset-intel-gw.c
>> Remove syscon and add regmap logic
>> Add support to legacy xrx200 SoC
>> Use bitfield helper functions for bit operations.
>> Change config RESET_INTEL_SYSCON-> RESET_INTEL_GW
>> drivers/reset/Kconfig | 9 ++
>> drivers/reset/Makefile | 1 +
>> drivers/reset/reset-intel-gw.c | 262 +++++++++++++++++++++++++++++++++++++++++
>> 3 files changed, 272 insertions(+)
>> create mode 100644 drivers/reset/reset-intel-gw.c
[...]
>> + set == !!(val & BIT(stat_bit)),
>> + 20, timeout);
>> +}
>> +
>> +static int intel_assert_device(struct reset_controller_dev *rcdev,
>> + unsigned long id)
>> +{
>> + struct intel_reset_data *data = to_reset_data(rcdev);
>> + int ret;
>> +
>> + ret = intel_set_clr_bits(data, id, true, 200);
> timeout doesn't have to be a parameter to intel_set_clr_bits.
Agree, not required to be a parameter.
Will update in the next patch version.
>
> [...]
>> +struct intel_reset_soc xrx200_data = {
>> + .legacy = true,
>> + .reset_cell_count = 3,
>> +};
>> +
>> +struct intel_reset_soc lgm_data = {
>> + .legacy = false,
>> + .reset_cell_count = 2,
>> +};
> Please make these two static const, otherwise this looks fine to me.
My miss, could have taken care.
I will update them in the next patch version.
Thanks Philipp for your time in reviewing the patch and giving the inputs.
Regards,
Dilip
>
> regards
> Philipp
>
prev parent reply other threads:[~2020-01-03 3:54 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-16 6:55 [PATCH v5 1/2] dt-bindings: reset: Add YAML schemas for the Intel Reset controller Dilip Kota
2019-12-16 6:55 ` [PATCH v5 2/2] reset: intel: Add system reset controller driver Dilip Kota
2020-01-02 11:43 ` Philipp Zabel
2020-01-03 3:54 ` Dilip Kota [this message]
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