From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2C4C2C34050 for ; Wed, 19 Feb 2020 13:07:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 03B2921D56 for ; Wed, 19 Feb 2020 13:07:42 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=st.com header.i=@st.com header.b="jGsQCxqd" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727082AbgBSNHl (ORCPT ); Wed, 19 Feb 2020 08:07:41 -0500 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:33376 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726558AbgBSNHk (ORCPT ); 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Wed, 19 Feb 2020 14:07:24 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id CE32D10002A; Wed, 19 Feb 2020 14:07:23 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag3node2.st.com [10.75.127.8]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id BC2132B739B; Wed, 19 Feb 2020 14:07:23 +0100 (CET) Received: from lmecxl0912.lme.st.com (10.75.127.47) by SFHDAG3NODE2.st.com (10.75.127.8) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 19 Feb 2020 14:07:23 +0100 Subject: Re: [PATCH v2 1/2] irqchip/stm32: Add irq retrigger support To: Marc Zyngier CC: Thomas Gleixner , Jason Cooper , Linus Walleij , , , , References: <20200218131218.10789-1-alexandre.torgue@st.com> <20200218131218.10789-2-alexandre.torgue@st.com> <16d27f75-8157-7a92-ae61-b5b3ab05bdd9@st.com> <608d9c84813323ee3839f6ac21aa8f4e@kernel.org> From: Alexandre Torgue Message-ID: Date: Wed, 19 Feb 2020 14:07:22 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 MIME-Version: 1.0 In-Reply-To: <608d9c84813323ee3839f6ac21aa8f4e@kernel.org> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit X-Originating-IP: [10.75.127.47] X-ClientProxiedBy: SFHDAG1NODE3.st.com (10.75.127.3) To SFHDAG3NODE2.st.com (10.75.127.8) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-19_03:2020-02-19,2020-02-19 signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2/19/20 12:43 PM, Marc Zyngier wrote: > On 2020-02-19 11:33, Alexandre Torgue wrote: >> Fix Marc email address >> >> On 2/18/20 2:12 PM, Alexandre Torgue wrote: >>> This commit introduces retrigger support for stm32_ext_h chip. >>> It consists to rise the GIC interrupt mapped to an EXTI line. >>> >>> Signed-off-by: Alexandre Torgue >>> >>> diff --git a/drivers/irqchip/irq-stm32-exti.c >>> b/drivers/irqchip/irq-stm32-exti.c >>> index e00f2fa27f00..c971d115edb4 100644 >>> --- a/drivers/irqchip/irq-stm32-exti.c >>> +++ b/drivers/irqchip/irq-stm32-exti.c >>> @@ -604,12 +604,24 @@ static void stm32_exti_h_syscore_deinit(void) >>>       unregister_syscore_ops(&stm32_exti_h_syscore_ops); >>>   } >>>   +static int stm32_exti_h_retrigger(struct irq_data *d) >>> +{ >>> +    struct stm32_exti_chip_data *chip_data = >>> irq_data_get_irq_chip_data(d); >>> +    const struct stm32_exti_bank *stm32_bank = chip_data->reg_bank; >>> +    void __iomem *base = chip_data->host_data->base; >>> +    u32 mask = BIT(d->hwirq % IRQS_PER_BANK); >>> + >>> +    writel_relaxed(mask, base + stm32_bank->swier_ofst); >>> + >>> +    return irq_chip_retrigger_hierarchy(d); > > Calling irq_chip_retrigger_hierarchy here is really odd. If the write > above has the effect of making the interrupt pending again, why do you > need to force the retrigger any further? To be honest, as we use hierarchical irq_chip, I thought it was the way to follow (to retrigger parent irq_chip). It makes maybe no sens here. The most important to regenerate gic interrupt (associate to the exti line) is to write in SWIER register. Alex > >             M.