From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760300AbaKAT4d (ORCPT ); Sat, 1 Nov 2014 15:56:33 -0400 Received: from www.linutronix.de ([62.245.132.108]:47410 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758469AbaKAT4a (ORCPT ); Sat, 1 Nov 2014 15:56:30 -0400 Date: Sat, 1 Nov 2014 20:56:20 +0100 (CET) From: Thomas Gleixner To: Andy Lutomirski cc: Peter Zijlstra , Valdis Kletnieks , "linux-kernel@vger.kernel.org" , Paul Mackerras , Arnaldo Carvalho de Melo , Ingo Molnar , Kees Cook , Andrea Arcangeli , Vince Weaver , "hillf.zj" , x86@kernel.org Subject: Re: [PATCH v2 3/8] x86: Store a per-cpu shadow copy of CR4 In-Reply-To: <3a54dd3353fffbf84804398e00dfdc5b7c1afd7d.1414190806.git.luto@amacapital.net> Message-ID: References: <3a54dd3353fffbf84804398e00dfdc5b7c1afd7d.1414190806.git.luto@amacapital.net> User-Agent: Alpine 2.11 (DEB 23 2013-08-11) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,SHORTCIRCUIT=-0.0001,URIBL_BLOCKED=0.001 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 24 Oct 2014, Andy Lutomirski wrote: > Context switches and TLB flushes can change individual bits of CR4. > CR4 reads take several cycles, so store a shadow copy of CR4 in a > per-cpu variable. > > To avoid wasting a cache line, I added the CR4 shadow to > cpu_tlbstate, which is already touched in switch_mm. The heaviest > users of the cr4 shadow will be switch_mm and __switch_to_xtra, and > __switch_to_xtra is called shortly after switch_mm during context > switch, so the cacheline is likely to be hot. > > Signed-off-by: Andy Lutomirski Reviewed-by: Thomas Gleixner