From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933070AbcJaBRe (ORCPT ); Sun, 30 Oct 2016 21:17:34 -0400 Received: from Galois.linutronix.de ([146.0.238.70]:51381 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932900AbcJaBR3 (ORCPT ); Sun, 30 Oct 2016 21:17:29 -0400 Date: Sun, 30 Oct 2016 19:14:42 -0600 (MDT) From: Thomas Gleixner To: Grzegorz Andrejczuk cc: mingo@redhat.com, hpa@zytor.com, x86@kernel.org, bp@suse.de, dave.hansen@linux.intel.com, lukasz.daniluk@intel.com, james.h.cownie@intel.com, jacob.jun.pan@intel.com, Piotr.Luc@intel.com, linux-kernel@vger.kernel.org Subject: Re: [PATCH v7 2/4] x86: Use HWCAP2 to expose Xeon Phi ring 3 MWAIT In-Reply-To: <1477662595-21011-3-git-send-email-grzegorz.andrejczuk@intel.com> Message-ID: References: <1477662595-21011-1-git-send-email-grzegorz.andrejczuk@intel.com> <1477662595-21011-3-git-send-email-grzegorz.andrejczuk@intel.com> User-Agent: Alpine 2.20 (DEB 67 2015-01-07) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 28 Oct 2016, Grzegorz Andrejczuk wrote: The subject subsystem wants to be 'x86/elf:' And please remove that Xeon PHI reference. See below. > Add HWCAP2 for x86 and reserve its 1st bit to expose s/1st bit/bit 0/ please > + > +/* Kernel enabled Ring 3 MWAIT for Xeon Phi*/ > +#define HWCAP2_PHIR3MWAIT (1 << 0) Can we please make that /* MWAIT/MONITOR are available in ring 3 */ #define HWCAP2_RING3MWAIT (1 << 0) Simply because this feature might become available on other platforms and then the PHI thing does not make any sense. We do not care on which CPU model this works, we care about the fact that it works. Thanks, tglx