From mboxrd@z Thu Jan 1 00:00:00 1970 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754813AbeAMVgs (ORCPT + 1 other); Sat, 13 Jan 2018 16:36:48 -0500 Received: from Galois.linutronix.de ([146.0.238.70]:37019 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754566AbeAMVg0 (ORCPT ); Sat, 13 Jan 2018 16:36:26 -0500 Date: Sat, 13 Jan 2018 22:36:13 +0100 (CET) From: Thomas Gleixner To: Tom Lendacky cc: "Van De Ven, Arjan" , "Woodhouse, David" , "linux-kernel@vger.kernel.org" , "x86@kernel.org" , "Mallick, Asit K" , "tim.c.chen@linux.intel.com" , "peterz@infradead.org" , "torvalds@linux-foundation.org" , "jpoimboe@redhat.com" , "ak@linux.intel.com" , "Williams, Dan J" , "riel@redhat.com" , "keescook@google.com" , "luto@kernel.org" , "pjt@google.com" , "bp@alien8.de" , "Hansen, Dave" , "jikos@kernel.org" , "gregkh@linux-foundation.org" Subject: Re: [PATCH v1] x86/retpoline: Use lfence in the retpoline/RSB filling RSB macros In-Reply-To: Message-ID: References: <20180113010728.27928.8537.stgit@tlendack-t1.amdoffice.net> <1515840369.22302.523.camel@amazon.co.uk> <0575AF4FD06DD142AD198903C74E1CC87A5C7FE4@FMSMSX151.amr.corp.intel.com> User-Agent: Alpine 2.20 (DEB 67 2015-01-07) MIME-Version: 1.0 Content-Type: multipart/mixed; BOUNDARY="8323329-552399425-1515879373=:2371" X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,SHORTCIRCUIT=-0.0001 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-552399425-1515879373=:2371 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8BIT On Sat, 13 Jan 2018, Tom Lendacky wrote: > On 1/13/2018 8:07 AM, Van De Ven, Arjan wrote: > >>> The RSB filling macro is applicable to AMD, and, if software is unable to > >>> verify that lfence is serializing on AMD (possible when running under a > >>> hypervisor), the generic retpoline support will be used and, so, is also > >>> applicable to AMD.  Change the use of pause to lfence. > >>> > >>> Signed-off-by: Tom Lendacky > >> > >> Conditionally-Acked-by: David Woodhouse > > > > > > pause is technically the "save me power" instruction > > > > how about a compromise where we do a double: > > > > pause > > lfence > > jmp > > > > as sequence... that way if the branch recovery is fast, we get the performance of pause, but if it takes a while, on AMD you get the behavior of lfence? > > That should work on AMD. I zapped the commit from tip for now until this discussion is resolved. Thanks, tglx --8323329-552399425-1515879373=:2371--