From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Google-Smtp-Source: AH8x226NfvpI51+wYaraZf4xW9YFi/i1vgM5R5jEI1P+8dyKE+yyql7syFv71N76HlZcWaQQhHaP ARC-Seal: i=1; a=rsa-sha256; t=1516545104; cv=none; d=google.com; s=arc-20160816; b=OP2B0EE08O9QJ3jJ8DN7Eq8lPCxdca3fQsOUtHmEKamJcyw/jlSE4A+2GVlhWCJOOe hb2orsFr91O+HouqekgHmmtp51ViPmnW4Al8jSJpCEbuL53dZm3hwEUusGN6fWvJ66o4 IeaT6QVJwwsW87fOCk1vIJ1H2NFvSePAx25SBJDxhUpqSH5K/VIJXrm8qbU/5osSz7Qp gbHy7n1XDlyfrnX0UR5VXd7HRrejYR8p4fbEuW4rvsRXQ0jy1AtKlgm/Ps5MdIrjI7wz Ax7U7OBmY3HCa4VhsL7trZ1Iykr8Aw8+pQVUecGKlH5eImuCFJqdQoGfWQ7t/wwVd+kM gVDw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:user-agent:references:message-id:in-reply-to:subject :cc:to:from:date:arc-authentication-results; bh=u4gf6E6tqR+0gkiJZTFYWoqKibU+lnZk/mVDcBRSGOg=; b=EhiSvL3O3lXLvir4LOSchpf0e2JUk3J/gzlWUp0EZzxm0vNFZFNUAYCEew66ISYvS/ halV4LyB67Ce4aPYrISj/OS7xT8GNeqv6bQcRSvjNQkVePwF/cE5lu7v0xhutV8HYY/s 9BTGcw8QsRFtSdiF0qnYP29vJ1pTh83jvdIahr3LHhn84CB3oB9f2zCyNvXqF456xf7W jn04q2DbOHR6MehKX15P1k0Pn8SgX43dy1/9iHD5eH5ymaQXF9ktgpYHpfiY1YwYHknI VWAWw/CqrKjeEFrl/jggudQC0vTiOE/V89y2XslIWW7cQTTXntGlclU+lj4fNCB9Hpyw eOQg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of tglx@linutronix.de designates 2a01:7a0:2:106d:700::1 as permitted sender) smtp.mailfrom=tglx@linutronix.de Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of tglx@linutronix.de designates 2a01:7a0:2:106d:700::1 as permitted sender) smtp.mailfrom=tglx@linutronix.de Date: Sun, 21 Jan 2018 15:31:28 +0100 (CET) From: Thomas Gleixner To: KarimAllah Ahmed cc: linux-kernel@vger.kernel.org, Andi Kleen , Andrea Arcangeli , Andy Lutomirski , Arjan van de Ven , Ashok Raj , Asit Mallick , Borislav Petkov , Dan Williams , Dave Hansen , David Woodhouse , Greg Kroah-Hartman , "H . Peter Anvin" , Ingo Molnar , Janakarajan Natarajan , Joerg Roedel , Jun Nakajima , Laura Abbott , Linus Torvalds , Masami Hiramatsu , Paolo Bonzini , Peter Zijlstra , =?ISO-8859-2?Q?Radim_Kr=E8m=E1=F8?= , Tim Chen , Tom Lendacky , kvm@vger.kernel.org, x86@kernel.org Subject: Re: [RFC 05/10] x86/speculation: Add basic IBRS support infrastructure In-Reply-To: <1516476182-5153-6-git-send-email-karahmed@amazon.de> Message-ID: References: <1516476182-5153-1-git-send-email-karahmed@amazon.de> <1516476182-5153-6-git-send-email-karahmed@amazon.de> User-Agent: Alpine 2.20 (DEB 67 2015-01-07) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,SHORTCIRCUIT=-0.0001 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: =?utf-8?q?1590140581449802182?= X-GMAIL-MSGID: =?utf-8?q?1590212799707361185?= X-Mailing-List: linux-kernel@vger.kernel.org List-ID: On Sat, 20 Jan 2018, KarimAllah Ahmed wrote: > From: David Woodhouse > > Not functional yet; just add the handling for it in the Spectre v2 > mitigation selection, and the X86_FEATURE_IBRS flag which will control > the code to be added in later patches. > > Also take the #ifdef CONFIG_RETPOLINE from around the RSB-stuffing; IBRS > mode will want that too. > > For now we are auto-selecting IBRS on Skylake. We will probably end up > changing that but for now let's default to the safest option. > > XX: Do we want a microcode blacklist? Oh yes, we want a microcode blacklist. Ideally we refuse to load the affected microcode in the first place and if its already loaded then at least avoid to use the borked features. PR texts promising that Intel is committed to transparency in this matter are not sufficient. Intel, please provide the facts, i.e. a proper list of micro codes and affected SKUs, ASAP. Thanks, tglx