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From: Thomas Gleixner <tglx@linutronix.de>
To: Andy Lutomirski <luto@kernel.org>
Cc: Fenghua Yu <fenghua.yu@intel.com>, Ingo Molnar <mingo@redhat.com>,
	H Peter Anvin <hpa@zytor.com>, Ashok Raj <ashok.raj@intel.com>,
	Alan Cox <alan@linux.intel.com>,
	Ravi V Shankar <ravi.v.shankar@intel.com>,
	linux-kernel <linux-kernel@vger.kernel.org>, x86 <x86@kernel.org>
Subject: Re: [PATCH 4/7] x86/umwait_contro: Set global umwait maximum time limit and umwait C0.2 state
Date: Wed, 1 Aug 2018 11:01:51 +0200 (CEST)	[thread overview]
Message-ID: <alpine.DEB.2.21.1808011100460.2501@nanos.tec.linutronix.de> (raw)
In-Reply-To: <28650265-964f-caeb-5ebb-788bf86ee9e3@kernel.org>

On Mon, 23 Jul 2018, Andy Lutomirski wrote:
> On 07/23/2018 05:55 AM, Fenghua Yu wrote:
> > UMWAIT or TPAUSE called by user process makes processor to reside in
> > a light-weight power/performance optimized state (C0.1 state) or an
> > improved power/performance optimized state (C0.2 state).
> > 
> > IA32_UMWAIT_CONTROL MSR register allows OS to set global maximum umwait
> > time and disable C0.2 on the processor.
> > 
> > The maximum time value in IA32_UMWAIT_CONTROL[31-2] is set as zero which
> > means there is no global time limit for UMWAIT and TPAUSE instructions.
> > Each process sets its own umwait maximum time as the instructions operand.
> > We don't set a non-zero global umwait maximum time value to enforce user
> > wait timeout because we couldn't find any usage for it.
> 
> Do you know what the instruction designers had in mind?  I assume they were
> thinking of *something*, but I'm seriously mystified by three things:
> 
>  - Why does CF work the way it does?  It seems like it would be genuinely
> useful for CF to indicate whether the in-register timeout has expired, but
> that's not what CF does.

Right, it would be useful to see whether the timeout caused the exit or
something else.

Thanks,

	tglx

  reply	other threads:[~2018-08-01  9:02 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-23 12:55 [PATCH 0/7] x86: Enable a few new instructions Fenghua Yu
2018-07-23 12:55 ` [PATCH 1/7] x86/cpufeatures: Enumerate MOVDIRI instruction Fenghua Yu
2018-07-23 12:55 ` [PATCH 2/7] x86/cpufeatures: Enumerate MOVDIR64B instruction Fenghua Yu
2018-07-23 12:55 ` [PATCH 3/7] x86/cpufeatures: Enumerate UMONITOR, UMWAIT, and TPAUSE instructions Fenghua Yu
2018-07-23 12:55 ` [PATCH 4/7] x86/umwait_contro: Set global umwait maximum time limit and umwait C0.2 state Fenghua Yu
2018-07-24  1:41   ` Andy Lutomirski
2018-08-01  9:01     ` Thomas Gleixner [this message]
2018-07-23 12:55 ` [PATCH 5/7] x86/vdso: Add vDSO functions for direct store instructions Fenghua Yu
2018-07-24  1:48   ` Andy Lutomirski
2018-07-24  3:42     ` Fenghua Yu
2018-07-24  5:27       ` Andy Lutomirski
2018-07-25 22:18         ` Fenghua Yu
2018-07-23 12:55 ` [PATCH 6/7] x86/vdso: Add vDSO functions for user wait instructions Fenghua Yu
2018-07-24  2:11   ` Andy Lutomirski
2018-07-24 15:14     ` Andy Lutomirski
2018-07-31 21:22     ` Thomas Gleixner
2018-07-31 21:38       ` Andy Lutomirski
2018-08-01  8:55         ` Thomas Gleixner
2018-07-23 12:55 ` [PATCH 7/7] selftests/vDSO: Add selftest to test vDSO functions for direct store and " Fenghua Yu

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