From: Thomas Gleixner <tglx@linutronix.de>
To: Christopher Hall <christopher.s.hall@intel.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>,
linux-rt-users <linux-rt-users@vger.kernel.org>,
jesus.sanchez-palencia@intel.com, gavin.hindman@intel.com,
liam.r.girdwood@intel.com, Peter Zijlstra <peterz@infradead.org>,
LKML <linux-kernel@vger.kernel.org>,
John Stultz <john.stultz@linaro.org>
Subject: Re: TSC to Mono-raw Drift
Date: Fri, 19 Oct 2018 17:25:02 +0200 (CEST) [thread overview]
Message-ID: <alpine.DEB.2.21.1810191720590.6075@nanos.tec.linutronix.de> (raw)
In-Reply-To: <20181015160945.5993-1-christopher.s.hall@intel.com>
Christopher,
Please Cc LKML on such issues in the future.
On Mon, 15 Oct 2018, Christopher Hall wrote:
Leaving context around for new readers:
> Problem Statement:
>
> The TSC clocksource mult/shift values are derived from CPUID[15H], but the
> monotonic raw clock value is not equal to TSC in nominal nanoseconds, i.e.
> the timekeeping code is not accurately transforming TSC ticks to nominal
> nanoseconds based on CPUID[15H}.
>
> The included code calculates the drift between nominal TSC nanoseconds and
> the monotonic raw clock.
>
> Background:
>
> Starting with 6th generation Intel CPUs, the TSC is "phase locked" to the
> Always Running Timer (ART). The relation between TSC and ART is read from
> CPUID[15H]. Details of the TSC-ART relation are in the "Invariant
> Timekeeping" section of the SDM.
>
> CPUID[15H].ECX returns the nominal frequency of ART (or crystal frequency).
> CPU feature TSC_KNOWN_FREQ indicates that tsc_khz (tsc.c) is derived from
> CPUID[15H]. The calculation is in tsc.c:native_calibrate_tsc().
>
> When the TSC clocksource is selected, the timekeeping code uses mult/shift
> values to transform TSC into nanoseconds. The mult/shift value is determined
> using tsc_khz.
>
> Example Output:
>
> Running for 3 seconds trial 1
> Scaled TSC delta: 3000328845
> Monotonic raw delta: 3000329117
> Ran for 3 seconds with 272 ns skew
>
> Running for 3 seconds trial 2
> Scaled TSC delta: 3000295209
> Monotonic raw delta: 3000295482
> Ran for 3 seconds with 273 ns skew
>
> Running for 3 seconds trial 3
> Scaled TSC delta: 3000262870
> Monotonic raw delta: 3000263142
> Ran for 3 seconds with 272 ns skew
>
> Running for 300 seconds trial 4
> Scaled TSC delta: 300000281725
> Monotonic raw delta: 300000308905
> Ran for 300 seconds with 27180 ns skew
>
> The skew between tsc and monotonic raw is about 91 PPB.
>
> System Information:
>
> CPU model string: Intel(R) Core(TM) i5-6600 CPU @ 3.30GHz
> Kernel version tested: 4.14.71-rt44
> NOTE: The skew seems to be insensitive to kernel version after
> introduction of TSC_KNOWN_FREQ capability
>
> >From CPUID[15H]:
> Time Stamp Counter/Core Crystal Clock Information (0x15):
> TSC/clock ratio = 276/2
> nominal core crystal clock = 24000000 Hz (table lookup)
>
> TSC kHz used to calculate mult/shift value: 3312000
Now the most interesting information here would be the resulting mult/shift
value which the kernel uses. Can you please provide that?
Thanks,
Thomas
next parent reply other threads:[~2018-10-19 15:25 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20181015160945.5993-1-christopher.s.hall@intel.com>
2018-10-19 15:25 ` Thomas Gleixner [this message]
2018-10-19 18:34 ` John Stultz
2018-10-19 18:39 ` John Stultz
2018-10-19 18:37 ` Thomas Gleixner
2018-10-19 18:48 ` John Stultz
2018-10-19 18:57 ` Thomas Gleixner
2018-10-19 19:21 ` John Stultz
2018-10-19 20:50 ` Thomas Gleixner
2018-10-19 22:36 ` John Stultz
2018-10-23 18:31 ` John Stultz
2018-10-24 14:51 ` Miroslav Lichvar
2018-10-24 17:32 ` Christopher Hall
2018-10-25 11:49 ` Miroslav Lichvar
2018-11-01 17:41 ` Thomas Gleixner
2018-11-02 10:26 ` Miroslav Lichvar
2018-11-02 11:27 ` Thomas Gleixner
2018-11-01 17:44 ` Thomas Gleixner
2018-11-01 17:56 ` John Stultz
2018-11-01 18:03 ` Thomas Gleixner
2018-11-02 11:20 ` Miroslav Lichvar
2018-11-02 11:25 ` Thomas Gleixner
2018-11-02 12:31 ` Miroslav Lichvar
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