From: Thomas Gleixner <tglx@linutronix.de>
To: Peter Zijlstra <peterz@infradead.org>
Cc: LKML <linux-kernel@vger.kernel.org>,
x86@kernel.org, Andy Lutomirski <luto@kernel.org>,
Josh Poimboeuf <jpoimboe@redhat.com>
Subject: Re: [patch 04/14] x86/exceptions: Make IST index zero based
Date: Mon, 1 Apr 2019 09:33:28 +0200 (CEST) [thread overview]
Message-ID: <alpine.DEB.2.21.1904010931480.2476@nanos.tec.linutronix.de> (raw)
In-Reply-To: <20190401073024.GB11158@hirez.programming.kicks-ass.net>
On Mon, 1 Apr 2019, Peter Zijlstra wrote:
> On Sun, Mar 31, 2019 at 11:40:24PM +0200, Thomas Gleixner wrote:
> > --- a/arch/x86/include/asm/page_64_types.h
> > +++ b/arch/x86/include/asm/page_64_types.h
> > @@ -25,11 +25,14 @@
> > #define IRQ_STACK_ORDER (2 + KASAN_STACK_ORDER)
> > #define IRQ_STACK_SIZE (PAGE_SIZE << IRQ_STACK_ORDER)
> >
> > -#define DOUBLEFAULT_STACK 1
> > -#define NMI_STACK 2
> > -#define DEBUG_STACK 3
> > -#define MCE_STACK 4
> > -#define N_EXCEPTION_STACKS 4 /* hw limit: 7 */
> > +/*
> > + * The index for the tss.ist[] array. The hardware limit is 7 entries.
> > + */
> > +#define DOUBLEFAULT_IST 0
> > +#define NMI_IST 1
> > +#define DEBUG_IST 2
> > +#define MCE_IST 3
> > +#define N_EXCEPTION_STACKS 4
>
> Would it make sense to use an enum here?
Yes, but ASM code hates enums. We could solve that by moving it to a
different header and exposing the necessary define via asm-offsets. I'll
have a look.
Thanks,
tglx
next prev parent reply other threads:[~2019-04-01 7:33 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-31 21:40 [patch 00/14] x86/exceptions: Add guard patches to IST stacks Thomas Gleixner
2019-03-31 21:40 ` [patch 01/14] x86/irq/64: Limit IST stack overflow check to #DB stack Thomas Gleixner
2019-04-01 18:03 ` Borislav Petkov
2019-04-02 16:34 ` Sean Christopherson
2019-03-31 21:40 ` [patch 02/14] x86/idt: Remove unused macro SISTG Thomas Gleixner
2019-04-01 4:04 ` Andy Lutomirski
2019-03-31 21:40 ` [patch 03/14] x86/exceptions: Remove unused stack defines on 32bit Thomas Gleixner
2019-03-31 21:40 ` [patch 04/14] x86/exceptions: Make IST index zero based Thomas Gleixner
2019-04-01 7:30 ` Peter Zijlstra
2019-04-01 7:33 ` Thomas Gleixner [this message]
2019-04-02 16:49 ` Sean Christopherson
2019-04-03 16:35 ` Borislav Petkov
2019-03-31 21:40 ` [patch 05/14] x86/cpu_entry_area: Cleanup setup functions Thomas Gleixner
2019-03-31 21:40 ` [patch 06/14] x86/exceptions: Add structs for exception stacks Thomas Gleixner
2019-03-31 21:40 ` [patch 07/14] x86/cpu_entry_area: Prepare for IST guard pages Thomas Gleixner
2019-03-31 21:40 ` [patch 08/14] x86/cpu_entry_area: Provide exception stack accessor Thomas Gleixner
2019-03-31 21:40 ` [patch 09/14] x86/traps: Use cpu_entry_area instead of orig_ist Thomas Gleixner
2019-03-31 21:40 ` [patch 10/14] x86/irq/64: Use cpu entry area " Thomas Gleixner
2019-03-31 21:40 ` [patch 11/14] x86/dumpstack/64: Use cpu_entry_area " Thomas Gleixner
2019-03-31 21:40 ` [patch 12/14] x86/cpu: Prepare TSS.IST setup for guard pages Thomas Gleixner
2019-04-02 16:57 ` Sean Christopherson
2019-03-31 21:40 ` [patch 13/14] x86/cpu: Remove orig_ist array Thomas Gleixner
2019-03-31 21:40 ` [patch 14/14] x86/exceptions: Enable IST guard pages Thomas Gleixner
2019-04-02 10:19 ` [patch 15/14] x86/dumpstack/64: Speedup in_exception_stack() Thomas Gleixner
2019-04-02 15:43 ` Josh Poimboeuf
2019-04-02 15:48 ` Thomas Gleixner
2019-04-02 15:51 ` Josh Poimboeuf
2019-04-02 15:53 ` Josh Poimboeuf
2019-04-03 8:08 ` Peter Zijlstra
2019-04-03 8:10 ` Peter Zijlstra
2019-04-03 15:11 ` Josh Poimboeuf
2019-04-02 16:11 ` Andy Lutomirski
2019-04-02 18:27 ` Thomas Gleixner
2019-04-02 19:29 ` Thomas Gleixner
2019-04-03 0:36 ` Andy Lutomirski
2019-04-03 16:26 ` Thomas Gleixner
2019-04-03 19:42 ` Thomas Gleixner
2019-04-04 0:03 ` Andy Lutomirski
2019-04-02 19:02 ` Rasmus Villemoes
2019-04-02 19:21 ` Thomas Gleixner
2019-04-03 8:02 ` Peter Zijlstra
2019-04-01 4:03 ` [patch 00/14] x86/exceptions: Add guard patches to IST stacks Andy Lutomirski
2019-04-03 16:30 ` Thomas Gleixner
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