From: Paul Walmsley <paul@booyaka.com>
To: Evan Green <evan@rivosinc.com>
Cc: Palmer Dabbelt <palmer@rivosinc.com>,
heiko@sntech.de, linux-doc@vger.kernel.org,
Andrew Bresticker <abrestic@rivosinc.com>,
Atish Patra <atishp@rivosinc.com>,
Conor Dooley <conor.dooley@microchip.com>,
Celeste Liu <coelacanthus@outlook.com>,
Jisheng Zhang <jszhang@kernel.org>,
linux-riscv@lists.infradead.org, Jonathan Corbet <corbet@lwn.net>,
Andrew Jones <ajones@ventanamicro.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Ley Foon Tan <leyfoon.tan@starfivetech.com>,
vineetg@rivosinc.com, Philipp Tomsich <philipp.tomsich@vrull.eu>,
Paul Walmsley <paul.walmsley@sifive.com>,
Heiko Stuebner <heiko.stuebner@vrull.eu>,
slewis@rivosinc.com, Samuel Holland <samuel@sholland.org>,
linux-kernel@vger.kernel.org, Conor Dooley <conor@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>, Guo Ren <guoren@kernel.org>
Subject: Re: [PATCH v6 4/6] RISC-V: hwprobe: Support probing of misaligned access performance
Date: Wed, 12 Apr 2023 13:50:32 +0000 (UTC) [thread overview]
Message-ID: <alpine.DEB.2.21.999.2304121350020.17765@utopia.booyaka.com> (raw)
In-Reply-To: <20230407231103.2622178-5-evan@rivosinc.com>
On Fri, 7 Apr 2023, Evan Green wrote:
> This allows userspace to select various routines to use based on the
> performance of misaligned access on the target hardware.
>
> Rather than adding DT bindings, this change taps into the alternatives
> mechanism used to probe CPU errata. Add a new function pointer alongside
> the vendor-specific errata_patch_func() that probes for desirable errata
> (otherwise known as "features"). Unlike the errata_patch_func(), this
> function is called on each CPU as it comes up, so it can save
> feature information per-CPU.
>
> The T-head C906 has fast unaligned access, both as defined by GCC [1],
> and in performing a basic benchmark, which determined that byte copies
> are >50% slower than a misaligned word copy of the same data size (source
> for this test at [2]):
>
> bytecopy size f000 count 50000 offset 0 took 31664899 us
> wordcopy size f000 count 50000 offset 0 took 5180919 us
> wordcopy size f000 count 50000 offset 1 took 13416949 us
>
> [1] https://github.com/gcc-mirror/gcc/blob/master/gcc/config/riscv/riscv.cc#L353
> [2] https://pastebin.com/EPXvDHSW
>
> Co-developed-by: Palmer Dabbelt <palmer@rivosinc.com>
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
> Signed-off-by: Evan Green <evan@rivosinc.com>
> Reviewed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
> Tested-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Reviewed-by: Paul Walmsley <paul.walmsley@sifive.com>
- Paul
next prev parent reply other threads:[~2023-04-12 13:57 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-07 23:10 [PATCH v6 0/6] RISC-V Hardware Probing User Interface Evan Green
2023-04-07 23:10 ` [PATCH v6 1/6] RISC-V: Move struct riscv_cpuinfo to new header Evan Green
2023-04-19 14:30 ` patchwork-bot+linux-riscv
2023-04-07 23:10 ` [PATCH v6 2/6] RISC-V: Add a syscall for HW probing Evan Green
2023-04-07 23:11 ` [PATCH v6 3/6] RISC-V: hwprobe: Add support for RISCV_HWPROBE_BASE_BEHAVIOR_IMA Evan Green
2023-04-14 1:37 ` Paul Walmsley
2023-04-07 23:11 ` [PATCH v6 4/6] RISC-V: hwprobe: Support probing of misaligned access performance Evan Green
2023-04-11 14:06 ` Conor Dooley
2023-04-12 13:50 ` Paul Walmsley [this message]
2023-04-07 23:11 ` [PATCH v6 5/6] selftests: Test the new RISC-V hwprobe interface Evan Green
2023-04-07 23:11 ` [PATCH v6 6/6] RISC-V: Add hwprobe vDSO function and data Evan Green
2023-04-11 14:16 ` [PATCH v6 0/6] RISC-V Hardware Probing User Interface Conor Dooley
2023-04-20 17:36 ` Palmer Dabbelt
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