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From: Paul Walmsley <paul.walmsley@sifive.com>
To: Atish Patra <atish.patra@wdc.com>
Cc: linux-kernel@vger.kernel.org, mark.rutland@arm.com,
	Albert Ou <aou@eecs.berkeley.edu>,
	Anup Patel <anup@brainfault.org>,
	Palmer Dabbelt <palmer@sifive.com>, Zong Li <zong@andestech.com>,
	merker@debian.org, linux-riscv@lists.infradead.org
Subject: Re: [v2 PATCH] RISC-V: Add a PE/COFF compliant Image header.
Date: Mon, 13 May 2019 15:31:16 -0700 (PDT)	[thread overview]
Message-ID: <alpine.DEB.2.21.9999.1905131522370.21198@viisi.sifive.com> (raw)
In-Reply-To: <20190501195607.32553-1-atish.patra@wdc.com>

On Wed, 1 May 2019, Atish Patra wrote:

> Currently, last stage boot loaders such as U-Boot can accept only
> uImage which is an unnecessary additional step in automating boot flows.
> 
> Add a PE/COFF compliant image header that boot loaders can parse and
> directly load kernel flat Image. The existing booting methods will continue
> to work as it is.
> 
> Another goal of this header is to support EFI stub for RISC-V in future.
> EFI specification needs PE/COFF image header in the beginning of the kernel
> image in order to load it as an EFI application. In order to support
> EFI stub, code0 should be replaced with "MZ" magic string and res5(at
> offset 0x3c) should point to the rest of the PE/COFF header (which will
> be added during EFI support).
> 
> Tested on both QEMU and HiFive Unleashed using OpenSBI + U-Boot + Linux.
> 
> Signed-off-by: Atish Patra <atish.patra@wdc.com>

Seems like we're stuck with this basic format for EFI, etc.  Even though 
we may be stuck with it, I think we should take the opportunity to add the 
possibility to extending this header format by adding fields after the 
basic PE/COFF header ends.

In particular, at the very least, I'd suggest adding a u32 after the 
PE/COFF header ends, to represent a "RISC-V header format version number".  
Then if we add more fields that follow the PE/COFF header -- for example, 
to represent the RISC-V instruction set extensions that are required to 
run this binary -- we can just bump that RISC-V-specific version number 
field to indicate to bootloaders that there's more there.

One other observation - if what's here was copied from some other 
architecture, like ARM, please acknowledge the source in the patch 
description.

thanks

- Paul

  parent reply	other threads:[~2019-05-13 22:31 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-01 19:56 [v2 PATCH] RISC-V: Add a PE/COFF compliant Image header Atish Patra
2019-05-05  0:37 ` Karsten Merker
2019-05-11 20:57 ` Karsten Merker
2019-05-13 22:31 ` Paul Walmsley [this message]
2019-05-13 23:18   ` Atish Patra
2019-05-14  0:09     ` Paul Walmsley
2019-05-14  0:34       ` Atish Patra
2019-05-14  0:39         ` Paul Walmsley
2019-05-14  1:13           ` Atish Patra
2019-05-16 16:20             ` Paul Walmsley
2019-05-23 18:35               ` Atish Patra
2019-05-23 18:45                 ` Paul Walmsley
2019-05-17 17:39 ` Paul Walmsley
2019-05-17 19:00   ` Atish Patra

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