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* [PATCH] riscv: kbuild: drop CONFIG_RISCV_ISA_C
@ 2019-08-07  2:30 Paul Walmsley
  2019-08-07  6:49 ` Christoph Hellwig
  2019-08-07 12:28 ` Bin Meng
  0 siblings, 2 replies; 9+ messages in thread
From: Paul Walmsley @ 2019-08-07  2:30 UTC (permalink / raw)
  To: linux-riscv; +Cc: linux-kernel, atish.patra


The baseline ISA support requirement for the RISC-V Linux kernel
mandates compressed instructions, so it doesn't make sense for
compressed instruction support to be configurable.

Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Atish Patra <atish.patra@wdc.com>

---
 arch/riscv/Kconfig  | 10 ----------
 arch/riscv/Makefile |  2 +-
 2 files changed, 1 insertion(+), 11 deletions(-)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 59a4727ecd6c..8c5b9329ec46 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -197,16 +197,6 @@ config TUNE_GENERIC
 
 endchoice
 
-config RISCV_ISA_C
-	bool "Emit compressed instructions when building Linux"
-	default y
-	help
-	   Adds "C" to the ISA subsets that the toolchain is allowed to emit
-	   when building Linux, which results in compressed instructions in the
-	   Linux binary.
-
-	   If you don't know what to do here, say Y.
-
 menu "supported PMU type"
 	depends on PERF_EVENTS
 
diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
index 7a117be8297c..e23e066c55e2 100644
--- a/arch/riscv/Makefile
+++ b/arch/riscv/Makefile
@@ -38,7 +38,7 @@ endif
 riscv-march-$(CONFIG_ARCH_RV32I)	:= rv32ima
 riscv-march-$(CONFIG_ARCH_RV64I)	:= rv64ima
 riscv-march-$(CONFIG_FPU)		:= $(riscv-march-y)fd
-riscv-march-$(CONFIG_RISCV_ISA_C)	:= $(riscv-march-y)c
+riscv-march-y				:= $(riscv-march-y)c
 KBUILD_CFLAGS += -march=$(subst fd,,$(riscv-march-y))
 KBUILD_AFLAGS += -march=$(riscv-march-y)
 
-- 
2.22.0


^ permalink raw reply related	[flat|nested] 9+ messages in thread

* Re: [PATCH] riscv: kbuild: drop CONFIG_RISCV_ISA_C
  2019-08-07  2:30 [PATCH] riscv: kbuild: drop CONFIG_RISCV_ISA_C Paul Walmsley
@ 2019-08-07  6:49 ` Christoph Hellwig
  2019-08-07 12:28 ` Bin Meng
  1 sibling, 0 replies; 9+ messages in thread
From: Christoph Hellwig @ 2019-08-07  6:49 UTC (permalink / raw)
  To: Paul Walmsley; +Cc: linux-riscv, atish.patra, linux-kernel

On Tue, Aug 06, 2019 at 07:30:24PM -0700, Paul Walmsley wrote:
> 
> The baseline ISA support requirement for the RISC-V Linux kernel
> mandates compressed instructions, so it doesn't make sense for
> compressed instruction support to be configurable.

Looks good,

Reviewed-by: Christoph Hellwig <hch@lst.de>

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH] riscv: kbuild: drop CONFIG_RISCV_ISA_C
  2019-08-07  2:30 [PATCH] riscv: kbuild: drop CONFIG_RISCV_ISA_C Paul Walmsley
  2019-08-07  6:49 ` Christoph Hellwig
@ 2019-08-07 12:28 ` Bin Meng
  2019-08-08 12:18   ` Charles Papon
  1 sibling, 1 reply; 9+ messages in thread
From: Bin Meng @ 2019-08-07 12:28 UTC (permalink / raw)
  To: Paul Walmsley; +Cc: linux-riscv, Atish Patra, linux-kernel

On Wed, Aug 7, 2019 at 10:30 AM Paul Walmsley <paul.walmsley@sifive.com> wrote:
>
>
> The baseline ISA support requirement for the RISC-V Linux kernel
> mandates compressed instructions, so it doesn't make sense for
> compressed instruction support to be configurable.
>
> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
> Cc: Atish Patra <atish.patra@wdc.com>
>
> ---
>  arch/riscv/Kconfig  | 10 ----------
>  arch/riscv/Makefile |  2 +-
>  2 files changed, 1 insertion(+), 11 deletions(-)
>

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH] riscv: kbuild: drop CONFIG_RISCV_ISA_C
  2019-08-07 12:28 ` Bin Meng
@ 2019-08-08 12:18   ` Charles Papon
  2019-08-12 15:03     ` Christoph Hellwig
  0 siblings, 1 reply; 9+ messages in thread
From: Charles Papon @ 2019-08-08 12:18 UTC (permalink / raw)
  To: Bin Meng; +Cc: Paul Walmsley, Atish Patra, linux-riscv, linux-kernel

Please do not drop it.

Compressed instruction extension has some specific overhead in small
RISC-V FPGA softcore, especialy in the ones which can't implement the
register file read in a asynchronous manner because of the FPGA
technology.
What are reasons to enforce RVC ?

On Wed, Aug 7, 2019 at 2:29 PM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> On Wed, Aug 7, 2019 at 10:30 AM Paul Walmsley <paul.walmsley@sifive.com> wrote:
> >
> >
> > The baseline ISA support requirement for the RISC-V Linux kernel
> > mandates compressed instructions, so it doesn't make sense for
> > compressed instruction support to be configurable.
> >
> > Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
> > Cc: Atish Patra <atish.patra@wdc.com>
> >
> > ---
> >  arch/riscv/Kconfig  | 10 ----------
> >  arch/riscv/Makefile |  2 +-
> >  2 files changed, 1 insertion(+), 11 deletions(-)
> >
>
> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH] riscv: kbuild: drop CONFIG_RISCV_ISA_C
  2019-08-08 12:18   ` Charles Papon
@ 2019-08-12 15:03     ` Christoph Hellwig
  2019-08-12 19:49       ` Darius Rad
  2019-08-12 22:18       ` Charles Papon
  0 siblings, 2 replies; 9+ messages in thread
From: Christoph Hellwig @ 2019-08-12 15:03 UTC (permalink / raw)
  To: Charles Papon
  Cc: Bin Meng, Atish Patra, linux-riscv, linux-kernel, Paul Walmsley

On Thu, Aug 08, 2019 at 02:18:53PM +0200, Charles Papon wrote:
> Please do not drop it.
> 
> Compressed instruction extension has some specific overhead in small
> RISC-V FPGA softcore, especialy in the ones which can't implement the
> register file read in a asynchronous manner because of the FPGA
> technology.
> What are reasons to enforce RVC ?

Because it it the unix platform baseline as stated in the patch.

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH] riscv: kbuild: drop CONFIG_RISCV_ISA_C
  2019-08-12 15:03     ` Christoph Hellwig
@ 2019-08-12 19:49       ` Darius Rad
  2019-08-12 22:18       ` Charles Papon
  1 sibling, 0 replies; 9+ messages in thread
From: Darius Rad @ 2019-08-12 19:49 UTC (permalink / raw)
  To: Christoph Hellwig, Charles Papon
  Cc: Atish Patra, linux-riscv, Bin Meng, linux-kernel, Paul Walmsley

On 8/12/19 11:03 AM, Christoph Hellwig wrote:
> On Thu, Aug 08, 2019 at 02:18:53PM +0200, Charles Papon wrote:
>> Please do not drop it.
>>
>> Compressed instruction extension has some specific overhead in small
>> RISC-V FPGA softcore, especialy in the ones which can't implement the
>> register file read in a asynchronous manner because of the FPGA
>> technology.
>> What are reasons to enforce RVC ?
> 
> Because it it the unix platform baseline as stated in the patch.
> 

The same argument could be made for an FPU or MMU, yet there are options 
to disable those.

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH] riscv: kbuild: drop CONFIG_RISCV_ISA_C
  2019-08-12 15:03     ` Christoph Hellwig
  2019-08-12 19:49       ` Darius Rad
@ 2019-08-12 22:18       ` Charles Papon
  2019-08-13  6:59         ` Christoph Hellwig
  2019-08-31  2:04         ` Paul Walmsley
  1 sibling, 2 replies; 9+ messages in thread
From: Charles Papon @ 2019-08-12 22:18 UTC (permalink / raw)
  To: Christoph Hellwig
  Cc: Bin Meng, Atish Patra, linux-riscv, linux-kernel, Paul Walmsley

> Because it it the unix platform baseline as stated in the patch.
I know that, but i'm looking for arguments why RVC could't be kept as
an option, especialy it is only an optimisation option without
behavioral/code changes.

That baseline make sense for heavy linux distributions, where you
expect everybody to compile with a baseline set of ISA extentions, to
make binary exchanges easier.
But for smaller systems, i do not see advantages having RVC forced.

On Mon, Aug 12, 2019 at 5:03 PM Christoph Hellwig <hch@infradead.org> wrote:
>
> On Thu, Aug 08, 2019 at 02:18:53PM +0200, Charles Papon wrote:
> > Please do not drop it.
> >
> > Compressed instruction extension has some specific overhead in small
> > RISC-V FPGA softcore, especialy in the ones which can't implement the
> > register file read in a asynchronous manner because of the FPGA
> > technology.
> > What are reasons to enforce RVC ?
>
> Because it it the unix platform baseline as stated in the patch.

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH] riscv: kbuild: drop CONFIG_RISCV_ISA_C
  2019-08-12 22:18       ` Charles Papon
@ 2019-08-13  6:59         ` Christoph Hellwig
  2019-08-31  2:04         ` Paul Walmsley
  1 sibling, 0 replies; 9+ messages in thread
From: Christoph Hellwig @ 2019-08-13  6:59 UTC (permalink / raw)
  To: Charles Papon
  Cc: Christoph Hellwig, Atish Patra, linux-riscv, Bin Meng,
	linux-kernel, Paul Walmsley

On Tue, Aug 13, 2019 at 12:18:22AM +0200, Charles Papon wrote:
> > Because it it the unix platform baseline as stated in the patch.
> I know that, but i'm looking for arguments why RVC could't be kept as
> an option, especialy it is only an optimisation option without
> behavioral/code changes.
> 
> That baseline make sense for heavy linux distributions, where you
> expect everybody to compile with a baseline set of ISA extentions, to
> make binary exchanges easier.
> But for smaller systems, i do not see advantages having RVC forced.

I don't fully agree with the benefits, but then again how little
impact using the C extension has on the kernel build I'm now convinced
that keeping it should be ok.

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH] riscv: kbuild: drop CONFIG_RISCV_ISA_C
  2019-08-12 22:18       ` Charles Papon
  2019-08-13  6:59         ` Christoph Hellwig
@ 2019-08-31  2:04         ` Paul Walmsley
  1 sibling, 0 replies; 9+ messages in thread
From: Paul Walmsley @ 2019-08-31  2:04 UTC (permalink / raw)
  To: Charles Papon
  Cc: Christoph Hellwig, Bin Meng, Atish Patra, linux-riscv, linux-kernel

Hi Charles,

On Tue, 13 Aug 2019, Charles Papon wrote:

> > Because it it the unix platform baseline as stated in the patch.
> I know that, but i'm looking for arguments why RVC could't be kept as
> an option, especialy it is only an optimisation option without
> behavioral/code changes.
> 
> That baseline make sense for heavy linux distributions, where you
> expect everybody to compile with a baseline set of ISA extentions, to
> make binary exchanges easier.
> But for smaller systems, i do not see advantages having RVC forced.

OK - I agree with you.

Still, I think it would be good if we made this option depend on other 
more general kernel configuration parameters for smaller systems.  Will 
think about this further.

Thanks for commenting on this, and am looking forward to adding a VexRiscv 
system to our kernel tests -


- Paul

^ permalink raw reply	[flat|nested] 9+ messages in thread

end of thread, other threads:[~2019-08-31  2:04 UTC | newest]

Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-08-07  2:30 [PATCH] riscv: kbuild: drop CONFIG_RISCV_ISA_C Paul Walmsley
2019-08-07  6:49 ` Christoph Hellwig
2019-08-07 12:28 ` Bin Meng
2019-08-08 12:18   ` Charles Papon
2019-08-12 15:03     ` Christoph Hellwig
2019-08-12 19:49       ` Darius Rad
2019-08-12 22:18       ` Charles Papon
2019-08-13  6:59         ` Christoph Hellwig
2019-08-31  2:04         ` Paul Walmsley

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