From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.2 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BCE05C4332B for ; Thu, 21 Jan 2021 18:08:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8DD4C23A58 for ; Thu, 21 Jan 2021 18:08:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389453AbhAUSIw (ORCPT ); Thu, 21 Jan 2021 13:08:52 -0500 Received: from mga17.intel.com ([192.55.52.151]:42490 "EHLO mga17.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389446AbhAUSHj (ORCPT ); Thu, 21 Jan 2021 13:07:39 -0500 IronPort-SDR: R3uaTUyQQeHh91xQnzgeUAvjNjZI50UtqFf4qp7r7ydRGBeNZmauttN2ssX4peSN0HNqsv+QBL /vCknqU7YMPA== X-IronPort-AV: E=McAfee;i="6000,8403,9871"; a="159094055" X-IronPort-AV: E=Sophos;i="5.79,364,1602572400"; d="scan'208";a="159094055" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jan 2021 10:05:53 -0800 IronPort-SDR: 9cu1I8h5Lp1klRFw0EE+R04Z18BzUkbxAHRM6F44I1AsFlQgnBeg+gbC8OAc8JtEzkHyUyPAHG 8GSy722I2XFg== X-IronPort-AV: E=Sophos;i="5.79,364,1602572400"; d="scan'208";a="385400859" Received: from rhweight-wrk1.ra.intel.com ([137.102.106.42]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jan 2021 10:05:53 -0800 Date: Thu, 21 Jan 2021 10:07:11 -0800 (PST) From: matthew.gerlach@linux.intel.com X-X-Sender: mgerlach@rhweight-WRK1 To: Pan Bian cc: Mark Brown , Xu Yilun , Tom Rix , Wu Hao , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] spi: altera: Fix memory leak on error path In-Reply-To: <20210120082635.49304-1-bianpan2016@163.com> Message-ID: References: <20210120082635.49304-1-bianpan2016@163.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 20 Jan 2021, Pan Bian wrote: > Release master that have been previously allocated if the number of > chipselect is invalid. > > Fixes: 8e04187c1bc7 ("spi: altera: add SPI core parameters support via platform data.") > Signed-off-by: Pan Bian Acked-by: Matthew Gerlach > --- > drivers/spi/spi-altera.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/spi/spi-altera.c b/drivers/spi/spi-altera.c > index cbc4c28c1541..62ea0c9e321b 100644 > --- a/drivers/spi/spi-altera.c > +++ b/drivers/spi/spi-altera.c > @@ -254,7 +254,8 @@ static int altera_spi_probe(struct platform_device *pdev) > dev_err(&pdev->dev, > "Invalid number of chipselect: %hu\n", > pdata->num_chipselect); > - return -EINVAL; > + err = -EINVAL; > + goto exit; > } > > master->num_chipselect = pdata->num_chipselect; > -- > 2.17.1 > >