From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A51B5C433E7 for ; Sat, 10 Oct 2020 00:53:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6BD7622248 for ; Sat, 10 Oct 2020 00:53:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729210AbgJJAw2 (ORCPT ); Fri, 9 Oct 2020 20:52:28 -0400 Received: from [157.25.102.26] ([157.25.102.26]:57356 "EHLO orcam.me.uk" rhost-flags-FAIL-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1728800AbgJJAax (ORCPT ); Fri, 9 Oct 2020 20:30:53 -0400 Received: from bugs.linux-mips.org (eddie.linux-mips.org [IPv6:2a01:4f8:201:92aa::3]) by orcam.me.uk (Postfix) with ESMTPS id ACDA22BE086; Sat, 10 Oct 2020 01:30:41 +0100 (BST) Date: Sat, 10 Oct 2020 01:30:38 +0100 (BST) From: "Maciej W. Rozycki" To: Thomas Bogendoerfer cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 1/2] MIPS: cpu-probe: move fpu probing/handling into its own file In-Reply-To: <20201008213327.11603-1-tsbogend@alpha.franken.de> Message-ID: References: <20201008213327.11603-1-tsbogend@alpha.franken.de> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 8 Oct 2020, Thomas Bogendoerfer wrote: > + /* > + * MAC2008 toolchain never landed in real world, so we're only > + * testing whether it can be disabled and don't try to enabled > + * it. > + */ > + fcsr0 = fcsr & ~(FPU_CSR_ABS2008 | FPU_CSR_NAN2008 | FPU_CSR_MAC2008); > + write_32bit_cp1_register(CP1_STATUS, fcsr0); > + fcsr0 = read_32bit_cp1_register(CP1_STATUS); > + > + fcsr1 = fcsr | FPU_CSR_ABS2008 | FPU_CSR_NAN2008; > + write_32bit_cp1_register(CP1_STATUS, fcsr1); > + fcsr1 = read_32bit_cp1_register(CP1_STATUS); > + > + write_32bit_cp1_register(CP1_STATUS, fcsr); > + > + if (c->isa_level & (MIPS_CPU_ISA_M32R2 | MIPS_CPU_ISA_M64R2)) { > + /* > + * The bit for MAC2008 might be reused by R6 in future, > + * so we only test for R2-R5. > + */ Umm, this has formatting issues with lines extending beyond column #80. Maciej