From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1957337AbdDZJBJ convert rfc822-to-8bit (ORCPT ); Wed, 26 Apr 2017 05:01:09 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:60598 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1433738AbdDZI7W (ORCPT ); Wed, 26 Apr 2017 04:59:22 -0400 From: Pierre Yves MORDRET To: Rob Herring , "M'boumba Cedric Madianga" CC: "mark.rutland@arm.com" , "devicetree@vger.kernel.org" , Alexandre TORGUE , "vinod.koul@intel.com" , "linux-kernel@vger.kernel.org" , "mcoquelin.stm32@gmail.com" , "dmaengine@vger.kernel.org" , "dan.j.williams@intel.com" , "linux-arm-kernel@lists.infradead.org" Subject: Re: [PATCH 1/5] dt-bindings: Document the STM32 DMAMUX bindings Thread-Topic: [PATCH 1/5] dt-bindings: Document the STM32 DMAMUX bindings Thread-Index: AQHSvmtOOqVb55RoOU2NityqKNaZpA== Date: Wed, 26 Apr 2017 08:58:43 +0000 Message-ID: References: <1489414561-28912-1-git-send-email-cedric.madianga@gmail.com> <1489414561-28912-2-git-send-email-cedric.madianga@gmail.com> <20170320213413.4b6uopuilznyr2rl@rob-hp-laptop> In-Reply-To: <20170320213413.4b6uopuilznyr2rl@rob-hp-laptop> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: user-agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 x-ms-exchange-messagesentrepresentingtype: 1 x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.75.127.45] Content-Type: text/plain; charset="Windows-1252" Content-ID: <54936E31323EA24EA66956EEE29DCDFE@st.com> Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-04-26_06:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Rob On 03/20/2017 10:34 PM, Rob Herring wrote: > On Mon, Mar 13, 2017 at 03:15:57PM +0100, M'boumba Cedric Madianga wrote: >> This patch adds the documentation of device tree bindings for the STM32 >> DMAMUX. >> >> Signed-off-by: M'boumba Cedric Madianga >> --- >> .../devicetree/bindings/dma/stm32-dmamux.txt | 57 ++++++++++++++++++++++ >> 1 file changed, 57 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/dma/stm32-dmamux.txt >> >> diff --git a/Documentation/devicetree/bindings/dma/stm32-dmamux.txt b/Documentation/devicetree/bindings/dma/stm32-dmamux.txt >> new file mode 100644 >> index 0000000..1039420 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/dma/stm32-dmamux.txt >> @@ -0,0 +1,57 @@ >> +STM32 DMA MUX (DMA request router) >> + >> +Required properties: >> +- compatible: "st,stm32-dmamux" >> +- reg: Memory map for accessing module >> +- #dma-cells: Should be set to <4>. >> + For more details about the four cells, please see stm32-dma.txt >> + documentation binding file >> +- dma-masters: Phandle pointing to the DMA controller >> +- clocks: Input clock of the DMAMUX instance. >> + >> +Optional properties: >> +- dma-channels : Number of DMA channels supported. >> +- dma-requests : Number of DMA requests supported. >> +- resets: Reference to a reset controller asserting the DMA controller >> + >> +Example: >> + >> +/* DMA controller */ >> +dma2: dma-controller@40026400 { >> + compatible = "st,stm32-dma"; >> + reg = <0x40026400 0x400>; >> + interrupts = <56>, >> + <57>, >> + <58>, >> + <59>, >> + <60>, >> + <68>, >> + <69>, >> + <70>; >> + clocks = <&clk_hclk>; >> + #dma-cells = <4>; >> + st,mem2mem; >> + resets = <&rcc 150>; >> + st,dmamux; >> + dma-channels = <8>; >> +}; >> + >> +/* DMA mux */ >> +dmamux2: dma-router@40020820 { >> + compatible = "st,stm32-dmamux"; >> + reg = <0x40020800 0x1c>; >> + #dma-cells = <4>; >> + dma-requests = <128>; >> + dma-masters = <&dma2>; > > I think this should be modeled after the interrupt-map property (or > Stephen Boyd's gpio-map support which additionally allows pass thru of > cell values). Something like this: > > dma-map = <0 41 0 0 &dma2 0 0 0>, > <1 42 0 0 &dma2 1 0 0>; > dma-map-mask = <0xffffffff 0xffffffff 0 0>; > > is the request number on dma2 controller. > > This is more generic and would work if you have a single mux with > multiple DMA controllers. > Would you mind to detail a little bit more your thoughts please ? Are dma-map & dma-map-mask part of an existing bindings ? or need to be developed ? I'm a little bit confused where come from values you used. >> +}; >> + >> +/* DMA client */ >> +usart1: serial@40011000 { >> + compatible = "st,stm32-usart", "st,stm32-uart"; >> + reg = <0x40011000 0x400>; >> + interrupts = <37>; >> + clocks = <&clk_pclk2>; >> + dmas = <&dmamux2 0 41 0x400 0x00>, >> + <&dmamux2 1 42 0x400 0x00>; >> + dma-names = "rx", "tx"; >> +}; >> -- >> 1.9.1 >> > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel > > >