From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.6 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E2C85C433DF for ; Fri, 15 May 2020 10:52:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BF26320709 for ; Fri, 15 May 2020 10:52:11 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="uEGVpH8g" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726242AbgEOKwL (ORCPT ); Fri, 15 May 2020 06:52:11 -0400 Received: from mail26.static.mailgun.info ([104.130.122.26]:46298 "EHLO mail26.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726204AbgEOKwK (ORCPT ); Fri, 15 May 2020 06:52:10 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1589539929; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=Ee8NO6/5OJ52E2zUjD2OXevvWt6lIkUWaN1XFxYR8Yc=; b=uEGVpH8g3G3EPHT0dJF0JKO/JfeT84rfvono/aGfSXdgyFDCYMeRnP4mk+R9X9sPxV33eWlX JgBIxIxrfL+6PdpLk3dHDMg58HGBTb+S70hOcxRqIshK4hHOcbyrtJs5St9CLNkgfCib/NsV PjmsrvggwFAM4p9KKAPOkI5PFxw= X-Mailgun-Sending-Ip: 104.130.122.26 X-Mailgun-Sid: WyI0MWYwYSIsICJsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3JnIiwgImJlOWU0YSJd Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n01.prod.us-east-1.postgun.com with SMTP id 5ebe744f8ebbf95ecb8fbd5b (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Fri, 15 May 2020 10:51:59 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 43333C43636; Fri, 15 May 2020 10:51:58 +0000 (UTC) Received: from blr-ubuntu-311.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: saiprakash.ranjan) by smtp.codeaurora.org (Postfix) with ESMTPSA id C7D77C433F2; Fri, 15 May 2020 10:51:53 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org C7D77C433F2 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=saiprakash.ranjan@codeaurora.org From: Sai Prakash Ranjan To: Mathieu Poirier , Suzuki K Poulose , Mike Leach , devicetree@vger.kernel.org, Rob Herring , Bjorn Andersson , Andy Gross Cc: Stephen Boyd , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, coresight@lists.linaro.org, Sai Prakash Ranjan Subject: [PATCH 1/2] arm64: dts: qcom: sc7180: Support ETMv4 power management Date: Fri, 15 May 2020 16:21:36 +0530 Message-Id: X-Mailer: git-send-email 2.22.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Now that deep idle states are properly supported on SC7180, we need to add "coresight-loses-context-with-cpu" property to avoid failure of trace session because of losing context on entering deep idle states. Reviewed-by: Stephen Boyd Signed-off-by: Sai Prakash Ranjan --- Resending this because the last patch sent here - https://lore.kernel.org/patchwork/patch/1230367/ seems to have added "coresight-loses-context-with-cpu" to replicator node instead of etm7 node. --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 4069bb1c93af..8b3707347547 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -1656,6 +1656,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -1674,6 +1675,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -1692,6 +1694,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -1710,6 +1713,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -1728,6 +1732,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -1746,6 +1751,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -1764,6 +1770,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -1782,6 +1789,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation