From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B5CA0C4167B for ; Mon, 11 Dec 2023 09:38:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234573AbjLKJiC convert rfc822-to-8bit (ORCPT ); Mon, 11 Dec 2023 04:38:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34078 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229768AbjLKJiA (ORCPT ); Mon, 11 Dec 2023 04:38:00 -0500 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F240DB3; Mon, 11 Dec 2023 01:38:05 -0800 (PST) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 3733424DC13; Mon, 11 Dec 2023 17:38:04 +0800 (CST) Received: from EXMBX062.cuchost.com (172.16.6.62) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 11 Dec 2023 17:38:03 +0800 Received: from EXMBX066.cuchost.com (172.16.7.66) by EXMBX062.cuchost.com (172.16.6.62) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 11 Dec 2023 17:38:03 +0800 Received: from EXMBX066.cuchost.com ([fe80::5947:9245:907e:339f]) by EXMBX066.cuchost.com ([fe80::5947:9245:907e:339f%17]) with mapi id 15.00.1497.044; Mon, 11 Dec 2023 17:38:03 +0800 From: JeeHeng Sia To: Conor Dooley CC: Shengyu Qu , "kernel@esmil.dk" , "robh+dt@kernel.org" , "krzysztof.kozlowski+dt@linaro.org" , "krzk@kernel.org" , "conor+dt@kernel.org" , "paul.walmsley@sifive.com" , "palmer@dabbelt.com" , "aou@eecs.berkeley.edu" , "daniel.lezcano@linaro.org" , "tglx@linutronix.de" , "conor@kernel.org" , "anup@brainfault.org" , "gregkh@linuxfoundation.org" , "jirislaby@kernel.org" , "michal.simek@amd.com" , Michael Zhu , "drew@beagleboard.org" , "devicetree@vger.kernel.org" , "linux-riscv@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Leyfoon Tan Subject: RE: [PATCH v3 6/6] riscv: dts: starfive: Add initial StarFive JH8100 device tree Thread-Topic: [PATCH v3 6/6] riscv: dts: starfive: Add initial StarFive JH8100 device tree Thread-Index: AQHaJFAfN2r53q/6u0mikZZoJRWxOLCez+mAgASMRMD//+TAgIAAoXXw Date: Mon, 11 Dec 2023 09:38:03 +0000 Message-ID: References: <20231201121410.95298-1-jeeheng.sia@starfivetech.com> <20231201121410.95298-7-jeeheng.sia@starfivetech.com> <358bcdb3f0ab4a7b9d6bbe17ca1a696d@EXMBX066.cuchost.com> <20231211-submerge-vegan-244889f1751c@wendy> In-Reply-To: <20231211-submerge-vegan-244889f1751c@wendy> Accept-Language: en-US, zh-CN Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [175.136.135.142] x-yovoleruleagent: yovoleflag Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Conor Dooley > Sent: Monday, December 11, 2023 3:59 PM > To: JeeHeng Sia > Cc: Shengyu Qu ; kernel@esmil.dk; robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org; > krzk@kernel.org; conor+dt@kernel.org; paul.walmsley@sifive.com; palmer@dabbelt.com; aou@eecs.berkeley.edu; > daniel.lezcano@linaro.org; tglx@linutronix.de; conor@kernel.org; anup@brainfault.org; gregkh@linuxfoundation.org; > jirislaby@kernel.org; michal.simek@amd.com; Michael Zhu ; drew@beagleboard.org; > devicetree@vger.kernel.org; linux-riscv@lists.infradead.org; linux-kernel@vger.kernel.org; Leyfoon Tan > > Subject: Re: [PATCH v3 6/6] riscv: dts: starfive: Add initial StarFive JH8100 device tree > > On Mon, Dec 11, 2023 at 01:38:06AM +0000, JeeHeng Sia wrote: > > > > > From: Shengyu Qu > > > Sent: Friday, December 8, 2023 8:09 PM > > > > Does the dubhe-80 cores actually support vector? Or vector support > > > > > > doesn't exist on actual silicon? > > > We don't have a use case for vector application in JH8100 > > I am sorry, but I am not clear on what this means. Do the CPUs on > the JH8100 support vector or not? The JH8100 CPU does not support vector operation.